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Concept

Logic synthesis

Related courses (9)

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Hardware compilation is the process of transforming specialized hardware description languages into circuit descriptions, which are iteratively refined, detailed and optimized. The course presents algorithms, tools and methods for hardware compilation an ...

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Students will acquire basic knowledge about methodologies and tools for the design, optimization, and verification of custom digital systems/hardware. They learn how to design synchronous digital circuits on register transfer level, analyse their timing a ...

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The course introduces the fundamentals of digital integrated circuits and the technology aspects from a designers perspective. It focuses mostly on transistor level, but discusses also the extension to large digital semicustom designs. ...

EE-330: Digital IC design

Digital IC Design presents the fundamentals of digital integrated circuit design. The methods and techniques aiming at the fabrication and development of digital integrated circuits are reviewed, the major design style pertaining to digital logic and memor ...

EE-110: Logic systems (for MT)

Ce cours couvre les fondements des systèmes numériques. Sur la base d'algèbre Booléenne et de circuitscombinatoires et séquentiels incluant les machines d'états finis, les methodes d'analyse et de synthèse de systèmelogiques sont étudiées et appliquée ...

EE-390(a): Lab on hardware-software digital systems codesign

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CS-470: Advanced computer architecture

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CS-724: Advanced logic synthesis and quantum computing

Logic synthesis describes techniques to map complex functionality into a sequence of a few, simple, and small logic primitives. It finds application dominantly in digital design, but is most recently also frequently used in cryptography and quantum computi ...

EE-431: Advanced VLSI design

In this project-based course, students collect hands-on experience with designing full-custom digital VLSI circuits in dynamic logic. They learn to carry out the design and optimization on transistor level, including logic and clock tree, the verification, ...