Publications associées à Circuit Level Modeling Methodology of Parasitic Substrate Current Injection from a High-Voltage H-bridge at High Temperature

Publications associées (31)

Highly Parallel RTL Simulation

Verification and testing of hardware heavily relies on cycle-accurate simulation of RTL. As single-processor performance is growing only slowly, conventional, single-threaded RTL simulation is becoming impractical for increasingly complex chip designs and ...

EPFL2024

Building Chips Faster: Hardware-Compiler Co-Design for Accelerated RTL Simulation

Sahand Kashani

The demise of Moore's Law and Dennard scaling has resulted in diminishing performance gains for general-purpose processors, and so has prompted a surge in academic and commercial interest for hardware accelerators. Specialized hardware has already redefine ...

EPFL2023

Automating the Design of Programmable Interconnect for Reconfigurable Architectures

Stefan Nikolic

With Moore's law coming to an end, increasingly more hope is being put in specialized hardware implemented on reconfigurable architectures such as Field-Programmable Gate Arrays (FPGAs). Yet, it is often neglected that these architectures themselves experi ...

EPFL2023

Analytic modelling of passive microfluidic mixers

Jean-Michel Sallese

This paper deals with a new analytical model for microfluidic passive mixers. Two common approaches already exist for such a purpose. On the one hand, the resolution of the advection-diffusion-reaction equation (ADRE) is the first one and the closest to ph ...

AMER INST MATHEMATICAL SCIENCES-AIMS2022

New Insights for Parasitic Effects of Label-Free Biosensors Based on Capacitive Micromachined Ultrasonic Transducers

Sandro Carrara, Yihe Zhao

Capacitive micromachined ultrasonic transducers (CMUTs) are regarded as an attractive candidate in bio-applications such as imaging and molecule monitoring. However, the previous researches on biochemical sensing are mostly air-coupled application based on ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2022

A Deep-Learning Approach to Side-Channel Based CPU Disassembly at Design Time

Mirjana Stojilovic

Side-channel CPU disassembly is a side-channel attack that allows an adversary to recover instructions executed by a processor. Not only does such an attack compromise code confidentiality, it can also reveal critical information on the system’s internals. ...

IEEE2022

Influence of Fin and Finger Number on TID Degradation of 16-nm Bulk FinFETs Irradiated to Ultrahigh Doses

Christian Enz

This article investigates the fin- and finger-number dependence of the total ionizing dose (TID) degradation in 16-nm bulk Si FinFETs at ultrahigh doses. n- and p-FinFETs designed with different numbers of fins and fingers are irradiated up to 500 Mrad(SiO ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2022

Enhancement-mode Multi-channel AlGaN/GaN Transistors with LiNiO Junction Tri-Gate

Elison de Nazareth Matioli, Luca Nela, Taifang Wang

Multi-channel GaN power device, consisting of stacking multiple two-dimensional-electron-gas (2DEG) channels, has been demonstrated to achieve unprecedented on-state performance while maintaining high breakdown voltage (VBR). However, the large carrier den ...

Institute of Electrical and Electronics Engineers2022

Low-Power Artificial Neural Network Perceptron Based on Monolayer MoS2

Aleksandra Radenovic, Andras Kis, Zhenyu Wang, Mukesh Kumar Tripathi, Guilherme Migliato Marega

Machine learning and signal processing on the edge are poised to influence our everyday lives with devices that will learn and infer from data generated by smart sensors and other devices for the Internet of Things. The next leap toward ubiquitous electron ...

2022

Utilizing XMG-based Synthesis to Preserve Self-Duality for RFET-Based Circuits

Giovanni De Micheli, Heinz Riener, Alessandro Tempia Calvino, Akash Kumar

Individual transistors based on emerging reconfigurable nanotechnologies exhibit electrical conduction for both types of charge carriers. These transistors (referred to as Reconfigurable Field-Effect Transistors (RFETs)) enable dynamic reconfiguration to d ...

2022

Near-junction microfluidic cooling for high power-density GaN-on-Si electronics: A wafer, device, packaging, and system-level investigation

Remco Franciscus Peter van Erp

Electrification of the energy section, from generation to end-use, plays an essential role in reducing global CO2 emission. Innovations in power electronics are required to increase conversion efficiency and power density. Gallium nitride (GaN) transistors ...

EPFL2022

Improving First-Order Threshold Implementations of SKINNY

Subhadeep Banik, Andrea Felice Caforio, Daniel Patrick Collins, Ognjen Glamocanin

Threshold Implementations have become a popular generic technique to construct circuits resilient against power analysis attacks.In this paper, we look to devise efficient threshold circuits for the lightweight block cipher family SKINNY. The only threshol ...

Springer2021

A novel approach for SPICE modeling of light and radiation effects in ICs

Chiara Rossi

Modeling the interaction of ionizing radiation, either light or ions, in integrated circuits is essential for the development and optimization of optoelectronic devices and of radiation-tolerant circuits. Whereas for optical sensors photogenerated carriers ...

EPFL2021

Random flip-flop: adding quantum randomness to digital circuits for improved cyber security, artificial intelligence and more

Edoardo Charbon, Claudio Bruschini, Ivan Michel Antolovic

Harnessing quantum randomness for the generation of random numbers is an important concept crucial for information security and many other computer-related applications. Quantum random number generators (QRNGs) are evolving from bulky, slow, and expensive ...

SPIE2021

A hybrid III-V tunnel FET and MOSFET technology platform integrated on silicon

Mihai Adrian Ionescu, Kirsten Emilie Moselund, Clarissa Convertino

InGaAs/GaAsSb tunnelling field-effect transistors and InGaAs metal-oxide-semiconductor field-effect transistors can be integrated on the same silicon substrate using conventional CMOS-compatible processes, creating a platform for potential use in low-power ...

NATURE RESEARCH2021

Characterization and Modeling of Total Ionizing Dose Effects on Nanoscale MOSFETs for Particle Physics Experiments

Chunmin Zhang

Total ionizing radiation compromises electrical characteristics of microelectronic devices and even causes functional failures of integrated circuits. It has been identified as a potential threat to electronic components, especially those in high-energy ph ...

EPFL2021

Enhancement Mode Tri-gate GaN Power Devices and Logic Circuits

Minghua Zhu

Gallium Nitride (GaN) is one of the most promising materials for high frequency power switching due to its exceptional properties such as large saturation velocity, high carrier mobility, and high breakdown field strength. The high switching frequency of G ...

EPFL2021

Cryogenic MOSFET Modeling for Large-Scale Quantum Computing

Arnout Lodewijk M Beckers

Promising results of state-of-the-art quantum computers fuel a world-wide effort in academic and private research laboratories to scale up the number of qubits and improve their characteristics in large arrays. To meet the scale-up challenge, innovative mi ...

EPFL2021

Cryogenic CMOS Integrated Circuits for Scalable Readout of Silicon Quantum Computers

Andrea Ruffino

Quantum computing promises to revolutionize our lives, achieving unprecedented computational powers and unlocking new possibilities in drug discovery, chemical simulations and cryptography. The fundamental unit of computation of a quantum computer is the q ...

EPFL2021

Further Results on Efficient Implementations of Block Cipher Linear Layers

Subhadeep Banik

At the FSE conference of ToSC 2018, Kranz et al. presented their results on shortest linear programs for the linear layers of several well known block ciphers in literature. Shortest linear programs are essentially the minimum number of 2-input xor gates r ...

2021