High-efficiency non-ablative UV laser nano-scale processing of fused silica by stable filamentation

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Post-CMOS Processing and 3-D Integration Based on Dry-Film Lithography

Yusuf Leblebici, Carlotta Guiducci, Yüksel Temiz

This paper presents a chip-level postcomplementary metal oxide semiconductor (CMOS) processing technique for 3-D integration and through-silicon-via (TSV) fabrication. The proposed technique is based on dry-film lithography, which is a low-cost and simple ...

Ieee-Inst Electrical Electronics Engineers Inc2013

In-Plane Fabricated Insulated Gold-Tip Probe For Electrochemical And Molecular Experiments

Nico de Rooij, Terunobu Akiyama, Peter Van der Wal, Sebastian Gautsch, Yexian Wu

In this contribution we present a scanning probe with a gold-tip completely encapsulated with insulator all the way to the apex. The probe fabrication is unique owing to an in-plane arrangement in which the width of the cantilever is defined by deep reacti ...

IEEE2013

Femtosecond laser-based optomechanical processes for permanent and high-precision fine alignment of optical systems

Saood Ibni Nazir

Miniaturization has been at the forefront of scientific research in the past decade covering diverse areas such as electronics, mechanics, and optics. While 'small is beautiful' may be a vast generalization, the true benefits of miniaturization are especia ...

EPFL2021

FABRICATION AND ANALYSIS OF THIN FILM LITHUM NIOBATE RESONATORS FOR 5GHz FREQUENCY AND LARGE k(t)(2) APPLICATIONS

Luis Guillermo Villanueva Torrijo, Soumya Yandrapalli, Seniz Esra Küçük

This work presents the fabrication and analysis of suspended thin film Lithium Niobate resonators. The yield of the new fabrication process presented below is >90% showing devices with high k(t)(2) of 28% resonators at 5GHz, making them suitable for high f ...

IEEE2021

Highly soluble energy relay dyes for dye-sensitized solar cells

Michael Graetzel, Jun Ho Yum

High solubility is a requirement for energy relay dyes (ERDs) to absorb a large portion of incident light and significantly improve the efficiency of dye-sensitized solar cells (DSSCs). Two benzonitrile-soluble ERDs, BL302 and BL315, were synthesized, char ...

Royal Society of Chemistry2013

The Michelangelo step: removing scalloping and tapering effects in high aspect ratio through silicon vias

Benoît Bruno Pasquier, Edoardo Charbon, Sandro Carrara, Simone Frasca, Rebecca Camilla Leghziel

We present here, for the first time, a fabrication technique that allows manufacturing scallop free, non-tapered, high aspect ratio in through-silicon vias (TSVs) on silicon wafers. TSVs are among major technology players in modern high-volume manufacturin ...

Nature Research2021

Deep-ultraviolet picosecond flat-top pulses by chirp-matched sum frequency generation

Christoph Peter Hauri

Picosecond, flat-top, deep-UV pulses are needed to generate high-brightness electron beams to efficiently drive x-ray free electron lasers. Current metal photocathodes have low efficiency and therefore require high-energy pulses, and the generation of high ...

2012

Enhanced-performance integrated Resonant Switched-Capacitor and Buck DC-DC converters for application in extreme radiation and magnetic field environments

Giacomo Ripamonti

DC-DC converters based on Application Specific Integrated Circuits (ASICs) have been developed in this doctoral work for the High-Luminosity Large Hadron Collider (HL-LHC) experiments at CERN. They step down the voltage from a 2.5 V line and supply a load ...

EPFL2020

All-stencil transistor fabrication on 3D silicon substrates

Jürgen Brugger, Luis Guillermo Villanueva Torrijo, Andreea Veronica Savu, Oscar Vazquez Mena, Peter Vettiger, Katrin Sidler Arnet, Cyrille Hibert, Cristina Martin Olmos, Philippe Langlet

The standard lithographic techniques to fabricate electronic components involve the use of polymers, baking steps and chemicals. This typically restricts their application to flat substrates made up of standard materials. Stencil lithography has been propo ...

Iop Publishing Ltd2012

3D Integration Technology for Lab-on-a-Chip Applications

Yüksel Temiz

This study adds a new dimension to lab-on-a-chip systems by employing three-dimensional (3D) integration technology for improved performance, higher functionality, and on-chip computational power. Despite the extensive amount of current research on 3D memo ...

EPFL2012

SiN membranes with submicrometer hole arrays patterned by wafer-scale nanosphere lithography

Jürgen Brugger, Andreea Veronica Savu, Oscar Vazquez Mena

In this work, nanosphere lithography was integrated with standard microfabrication for the wafer-scale fabrication of silicon nitride (SiN) membranes with arrays of submicrometer holes. A monolayer of polystyrene (PS) beads with a mean diameter of 428 or 5 ...

2011