A Process Compensated Gain Cell Embedded-DRAM for Ultra-Low-Power Variation-Aware Design

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Evaluation of Site Errors in LLS Magnetic Direction Finding Caused by Large Hills Using the 3D‐FDTD Technique

Farhad Rachidi-Haeri, Hannes Kohlmann

Angle and amplitude estimation errors in magnetic direction finding, called site errors, are important sensor-specific errors in lightning location systems (LLS). They are known to be caused by nearby cables and overhead lines due to induced currents. Due ...

2021

Lightning-Induced Voltages on Overhead Distribution Lines Computed through Analytical Expressions for the Electromagnetic Fields

Farhad Rachidi-Haeri, Marcos Rubinstein

The evaluation of lightning ElectroMagnetic (EM) fields represents the most cumbersome part of the lightning-induced voltages computation process. Their evaluation is usually performed through a numerical routine or with simplified analytical expressions, ...

2021

Replica Bit-Line Technique for Internal Refresh in Logic-Compatible Gain-Cell Embedded DRAM

Robert Giterman

Embedded memories, mostly implemented with static random access memory (SRAM), dominate the area and power of integrated circuits. Gain-cell embedded DRAM (GC-eDRAM) is an alternative to SRAM due to its high density, low power consumption, and two-ported f ...

ELSEVIER SCI LTD2020

Gain-Cell Embedded DRAMs: Modeling and Design Space

Andreas Peter Burg, Robert Giterman, Andrea Bonetti, Adam Shmuel Teman

Among the different types of dynamic random-access memories (DRAMs), gain-cell embedded DRAM (GC-eDRAM) is a compact, low-power, and CMOS-compatible alternative to conventional static random-access memory (SRAM). GC-eDRAM achieves high memory density, as i ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2020

Gain-Cell Embedded DRAMs: Modeling and Design Space

Andreas Peter Burg, Robert Giterman, Andrea Bonetti, Adam Shmuel Teman

Among the different types of DRAMs, gain-cell embedded DRAM (GC-eDRAM) is a compact, low-power and CMOS-compatible alternative to conventional SRAM. GC-eDRAM achieves high memory density as it relies on a storage cell that can be implemented with as few as ...

IEEE2020

Current-Based Data-Retention-Time Characterization of Gain-Cell Embedded DRAMs Across the Design and Variations Space

Andreas Peter Burg, Adam Shmuel Teman, Robert Giterman, Andrea Bonetti

The rise of data-intensive applications has resulted in an increasing demand for high-density and low-power on-chip embedded memories. Gain-cell embedded DRAM (GC-eDRAM) is a logic-compatible alternative to conventional static random access memory (SRAM) w ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2020

Time reversal applied to fault location in power networks: Pilot test results and analyses

Mario Paolone, Zhaoyang Wang, Reza Razzaghi

This paper presents the results of a pilot test performed on a real medium voltage distribution network in Switzerland with the aim of assessing the performance of a fault location system relying on the Electromagnetic Time Reversal (EMTR) method. To the b ...

2020

Blade: An in-Cache Computing Architecture for Edge Devices

David Atienza Alonso, Marina Zapater Sancho, Alexandre Sébastien Julien Levisse, Marco Antonio Rios, William Andrew Simon, Yasir Mahmood Qureshi

Area and power constrained edge devices are increasingly utilized to perform compute intensive workloads, necessitating increasingly area and power efficient accelerators. In this context, in-SRAM computing performs hundreds of parallel operations on spati ...

2020

Genome Sequence Alignment - Design Space Exploration for Optimal Performance and Energy Architectures

David Atienza Alonso, Marina Zapater Sancho, Yasir Mahmood Qureshi

Next generation workloads, such as genome sequencing, have an astounding impact in the healthcare sector. Sequence alignment, the first step in genome sequencing, has experienced recent breakthroughs, which resulted in next generation sequencing (NGS). As ...

2020

Access pattern based optimization of memory access

Anastasia Ailamaki, Georgios Psaropoulos

A method for optimizing memory access for database operations is provided. The method may include identifying an access pattern associated with a database operation. The access pattern may include data required to perform the database operation. One or mor ...

2020

GC-eDRAM with Body-Bias Compensated Readout and Error Detection in 28nm FD-SOI

Andreas Peter Burg, Robert Giterman, Andrea Bonetti, Adam Shmuel Teman

Gain-cell embedded DRAM (GC-eDRAM) is an attractive alternative to conventional SRAM due to its high-density, low-leakage, and inherent two-ported functionality. However, its dynamic storage mechanism requires power-hungry refresh cycles to maintain data. ...

IEEE2020

A scalable, line-independent control design algorithm for voltage and frequency stabilization in AC islanded microgrids

Giancarlo Ferrari Trecate, Michele Tucci

We propose a decentralized control synthesis procedure for stabilizing voltage and frequency in AC Islanded microGrids (ImGs) composed of Distributed Generation Units (DGUs) and loads interconnected through power lines. The presented approach enables Plug- ...

2020