Publications associées à A back-illuminated 3D-stacked single-photon avalanche diode in 45nm CMOS technology

Publications associées (31)

Exploring negative capacitance and neuromorphic devices based on CMOS-compatible ferroelectric HfO2

Ferroelectric materials are explored for numerous applications thanks to their properties associated with electrically switchable spontaneous polarization. Perovskites are an established class of ferroelectrics used for sensors and actuators. However, they ...

EPFL2022

Electrical Spectroscopy of Defect States in Synthetic 2D Materials

Yanfei Zhao

Two-dimensional (2D) materials such as graphene and transition metal dichalcogenide (TMDC) are considered as one of the most promising material platforms for future electronic devices, due to their ultra-thin thickness and fascinating electrical and optica ...

EPFL2022

Nanowatt Acoustic Inference Sensing Exploiting Nonlinear Analog Feature Extraction

Christian Enz, Minhao Yang

Ultralow-power sensing with inference functionality embedded in sensor nodes is essential for enabling the emerging pervasive intelligence. For acoustic inference sensing, the feature extraction can take advantage of power-efficient analog circuits. Howeve ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2021

Cryogenic MOSFET Modeling for Large-Scale Quantum Computing

Arnout Lodewijk M Beckers

Promising results of state-of-the-art quantum computers fuel a world-wide effort in academic and private research laboratories to scale up the number of qubits and improve their characteristics in large arrays. To meet the scale-up challenge, innovative mi ...

EPFL2021

A hybrid III-V tunnel FET and MOSFET technology platform integrated on silicon

Mihai Adrian Ionescu, Kirsten Emilie Moselund, Clarissa Convertino

InGaAs/GaAsSb tunnelling field-effect transistors and InGaAs metal-oxide-semiconductor field-effect transistors can be integrated on the same silicon substrate using conventional CMOS-compatible processes, creating a platform for potential use in low-power ...

NATURE RESEARCH2021

Intrinsic switching in Si-doped HfO2: A study of Curie-Weiss law and its implications for negative capacitance field-effect transistor

Mihai Adrian Ionescu, Igor Stolichnov, Ali Saeidi, Matteo Cavalieri, Teodor Rosca, Carlotta Gastaldi, Sadegh Kamaei Bahmaei, Eamon Patrick O'Connor

HfO2-based ferroelectrics are considered a promising class of materials for logic and memory applications due to their CMOS compatibility and ferroelectric figures of merit. A steep-slope field-effect-transistor (FET) switch is a device for logic applicati ...

AMER INST PHYSICS2021

Enhanced-performance integrated Resonant Switched-Capacitor and Buck DC-DC converters for application in extreme radiation and magnetic field environments

Giacomo Ripamonti

DC-DC converters based on Application Specific Integrated Circuits (ASICs) have been developed in this doctoral work for the High-Luminosity Large Hadron Collider (HL-LHC) experiments at CERN. They step down the voltage from a 2.5 V line and supply a load ...

EPFL2020

First Near-Ultraviolet- and Blue-Enhanced Backside-Illuminated Single-Photon Avalanche Diode Based on Standard SOI CMOS Technology

Edoardo Charbon, Claudio Bruschini, Myung Jae Lee

We present the world's first backside-illuminated (BSI) single-photon avalanche diode (SPAD) based on standard silicon-on-insulator (SOI) complementary metal-oxide semiconductor (CMOS) technology. This SPAD achieves a good dark count rate (DCR) after backs ...

2019

Performance improvement of chip-level CMOS-integrated ReRAM cells through material optimization

Yusuf Leblebici, Thomas La Grange, Tugba Demirci, Elmira Shahrabi

The integration of the resistive random access memory (ReRAM) with CMOS logic circuitry provides a solution to scaling limitations, and offers promising candidates for use in next generation computing applications. It is challenging to realize a reliable, ...

ELSEVIER SCIENCE BV2019

Exploration of Negative Capacitance Devices and Technologies

Ali Saeidi

Conventional device scaling has been the main guiding principle of the MOS device engineering over these past years. However, this aggressive scaling would be eventually limited due to the inability to remove the heat generated by MOSFET devices. The power ...

EPFL2019

Modeling of Total Ionizing Dose Degradation on 180-nm n-MOSFETs Using BSIM3

Nergiz Sahin Solmaz

This paper presents a modeling approach to simulate the impact of total ionizing dose (TID) degradation on low-power analog and mixed-signal circuits. The modeling approach has been performed on 180-nm n-type metal-oxide-semiconductor field-effect transist ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2019

ReRAM From Material Study to CMOS Co-integration

Elmira Shahrabi

The revolution of information-technology owes to silicon-based complementary-metal-oxide (CMOS) technology. However, CMOS technology approaches its physical limitation hardening the further progress of memory devices as well as computing paradigm requiring ...

EPFL2019

Negative Capacitance as Universal Digital and Analog Performance Booster for Complementary MOS Transistors

Mihai Adrian Ionescu, Christian Enz, Farzan Jazaeri, Igor Stolichnov, Ali Saeidi

Boltzmann electron energy distribution poses a fundamental limit to lowering the energy dissipation of conventional MOS devices, a minimum increase of the gate voltage, i.e. 60 mV, is required for a 10-fold increase in drain-to-source current at 300 K. Neg ...

Nature Research2019

Polarity-Controllable Devices and Circuits for Doping-Free 2D Electronics

Giovanni Vincenzo Resta

The growth of information technology has been sustained by the miniaturization of Complementary Metal-Oxide-Semiconductor (CMOS) Field-Effect Transistors (FETs), with the number of devices per unit area constantly increasing, as exemplified by Mooreâ s la ...

EPFL2019

Fabrication and Characterization of Freestanding Single Crystal Diamond and Silicon Microresonators

Teodoro Graziosi

Microresonators are fundamental building blocks of any photonic integrated circuit, as they can be used as filters, modulators, sensors, and to enhance light emission. If these resonators are suspended and are free to oscillate, we can exploit the interact ...

EPFL2019

High-Performance Back-Illuminated Three-Dimensional Stacked Single-Photon Avalanche Diode Implemented in 45-nm CMOS Technology

Edoardo Charbon, Myung Jae Lee, Preethi Padmanabhan, Augusto Ronchini Ximenes

We present a high-performance back-illuminated three-dimensional stacked single-photon avalanche diode (SPAD), which is implemented in 45-nm CMOS technology for the first time. The SPAD is based on a P + /Deep N-well junction with a circular shape, for whi ...

2018

Benchmarking of Homojunction Strained-Si NW Tunnel FETs for Basic Analog Functions

Mihai Adrian Ionescu, Arnab Biswas, Cem Alper

This paper reports a compact ambipolar model for homojunction strained-silicon (sSi) nanowire (NW) tunnel FETs (TFETs) capable of accurately describing both I-V and G-V characteristics in all regimes of operation, n- and p-ambipolarity, the superlinear ons ...

Institute of Electrical and Electronics Engineers2017

Negative Capacitance as Performance Booster for Tunnel FETs and MOSFETs: An Experimental Study

Mihai Adrian Ionescu, Christian Enz, Farzan Jazaeri, Igor Stolichnov, Ali Saeidi, Francesco Bellando

This letter reports for the first time a full experimental study of performance boosting of tunnel FETs (TFETs) and MOSFETs by negative capacitance (NC) effect. We discuss the importance of capacitance matching between a ferroelectric NC and a device capac ...

Institute of Electrical and Electronics Engineers2017

Characterization of GigaRad Total Ionizing Dose and Annealing Effects on 28-nm Bulk MOSFETs

Christian Enz, Claudio Bruschini, Farzan Jazaeri, Chunmin Zhang, Alessandro Pezzotta

This paper investigates the radiation tolerance of 28-nm bulk n and pMOSFETs up to 1 Grad of total ionizing dose (TID). The radiation effects on this commercial 28-nm bulk CMOS process demonstrate a strong geometry dependence as a result of the complex int ...

2017

A Steep-Slope Transistor Combining Phase-Change and Band-to-Band-Tunneling to Achieve a sub-Unity Body Factor

Mihai Adrian Ionescu, Josef Andreas Schuler, Wolfgang Amadeus Vitale, Anna Krammer, Emanuele Andrea Casu, Arnab Biswas, Cem Alper, Teodor Rosca

Steep-slope transistors allow to scale down the supply voltage and the energy per computed bit of information as compared to conventional field-effect transistors (FETs), due to their sub-60 mV/decade subthreshold swing at room temperature. Currently pursu ...

Nature Research2017