Formation and properties of nanometer-thick platinum silicide layers

Platinum silicide films are widely used in silicon devices for ohmic and Schottky contacts. It has been demonstrated in the recent years that Schottky barriers employing ultra-thin platinum silicide films (thickness < 10 nm) are useful for photodetection in the near infrared. We have studied the formation of thin platinum silicide films and their electrical properties as a function of the annealing temperature in presence of an interfacial native silicon oxide layer and with plasma etching damage on the Si substrate surface. The thickness of the interfacial oxide layer was varied as well as the depth of the plasma etching damage. The interest of these investigations lies in understanding the role played by the imperfections due to the two usual cleaning processes, namely incomplete SiO2 chemical removal and Si damace due to plasma etching bombardment, on the final silicide film characteristics. The quality and reproducibility of platinum silicide films in routine fabrication depends strongly of the process control, where the substrate cleanliness plays a crucial role. The native silicon oxide can be present at the silicon substrate surface due to an incomplete chemical etching or due to the rapid re-growth of the oxide after the chemical etching. It is well accepted that this interfacial oxide layer can cause problems for Pt-contact metallization, although the characteristics of the resulting platinum silicide film as a function of the oxide thickness and the annealing temperature are not well known. On the other hand, to guarantee the complete removal of the native silicon oxide mainly in the delicate ultra-thin silicide films fabrication, a plasma etching bombardment is performed on the substrate surface prior to metal deposition. This can introduce a certain amount of damage in the substrate surface which can influence the Pt-Si reaction as well as the morphology, crystallography and electrical characteristics of these films. We prepared samples using different chemical etching procedures to obtain complete and incomplete native oxide layer removal. Plasma etching on the substrate surface was performed for various duration and using a range of discharge powers to obtain different plasma etching damage depth. The silicidation reaction was performed at different annealing temperatures. Five characterization techniques were used to study these samples: Transmission Electron Microscopy (TEM), Scanning Electron Microscopy (SEM), Photoelectron Microscopy (PEM), Internal Photoemission (IPE) and Four-Point Probe Measurements. Morphological, compositional, structural and crystallographic information is obtained from the first three techniques. This is subsequently correlated to the electrical properties of the films obtained using the last two techniques. We observe that silicide films with interfacial oxide layer up to 2.2 nm-thick, annealed at an appropriate temperature, are equivalent to oxide-free samples for application in device metallization. Re