Novel Approaches Toward Area- and Energy-Efficient Embedded Memories

Chattez avec Graph Search

Posez n’importe quelle question sur les cours, conférences, exercices, recherches, actualités, etc. de l’EPFL ou essayez les exemples de questions ci-dessous.

AVERTISSEMENT : Le chatbot Graph n'est pas programmé pour fournir des réponses explicites ou catégoriques à vos questions. Il transforme plutôt vos questions en demandes API qui sont distribuées aux différents services informatiques officiellement administrés par l'EPFL. Son but est uniquement de collecter et de recommander des références pertinentes à des contenus que vous pouvez explorer pour vous aider à répondre à vos questions.

There is a never-ending push for electronic systems to provide faster operation speeds, higher energy efficiencies, and higher power capabilities at smaller scales. These requirements are apparent in different areas of electronics, from radiofrequency (RF) ...

This paper presents an energy-efficient, duty-cycled, and spinning excitation bridge-to-digital converter (BDC) designed for implantable pressure sensing systems. The circuit provides the measure of the pulmonary artery pressure that is particularly releva ...

This paper proposes a simple model of the thermal noise excess factor in saturation gamma(nsat) for short-channel transistors affected by velocity saturation. It is shown that gamma(nsat) in strong inversion and saturation under velocity saturation increas ...

We present the world's first backside-illuminated (BSI) single-photon avalanche diode (SPAD) based on standard silicon-on-insulator (SOI) complementary metal-oxide semiconductor (CMOS) technology. This SPAD achieves a good dark count rate (DCR) after backs ...

In order for any non-volatile memory (NVM) to be considered a viable technology, its reliability should be verified at the array level. In particular, properties such as high endurance and at least moderate data retention are considered essential. Phase-ch ...

An universal remote powering and communication system is presented for the implantable medical devices. The system be interfaced with different sensors or actuators. A mobile external unit controls the operation of the implantable chip and reads the sensor ...

With scaling of process technologies and worsening of process variations, embedded memories are susceptible to a large number of failure mechanisms making it hard to achieve high yield. In this paper, by bringing together architecture and circuit-level exp ...

This letter presents a CMOS-compatible photodetector displaying direct light-to-time conversion and intrinsic charge integration with a very low dark current. This device is particularly adapted for applications requiring high sensitivity such as biolumine ...

We have studied multi-section InGaN multiple-quantum-well (MQW) laser diodes grown on c-plane freestanding GaN substrate consisting of an absorber section (AS) and an amplifier gain section. As a result of the interplay between external bias applied to the ...

The paper presents a new CMOS implementation of the initialization mechanism for Kohonen self-organizing neural networks. A proper selection of initial values of the weights of the neurons exhibits a significant impact on the quality of the learning proces ...

The paper presents a programmable triangular neighborhood function for application in low power transistor level implemented Kohonen self-organized maps (SOMs). Detailed simulations carried out for the software model of such network show that the triangula ...

Nanometer CMOS scaling has resulted in greatly increased circuit variability, with extremely adverse consequences on design predictability and yield. A number of recent works have focused on adaptive post-fabrication tuning approaches to mitigate this prob ...

This work reports on memory applications of punch-through impact ionization single-transistor latch (PIMOS), showing abrupt current switching (3-10mV/dec.) as well as hysteresis in both ID(VDS) and ID(VGS). A capacitor-less 1PIMOS - 1 MOSFET DRAM memory is ...

This article presents a novel and robust approach for implementing ultra-low power MOS current mode logic (MCML) circuits. To operate at very low bias currents, a simple and compact high resistance load device has been introduced. Operating in subthreshold ...

Novel Approaches Toward Area- and Energy-Efficient Embedded Memories

Chattez avec Graph Search

New ultrahigh-speed device concepts: from THz nanoplasma devices to glass-like electronics for neuromorphic computation

An Energy-Efficient Bridge-to-Digital Converter for Implantable Pressure Monitoring Systems

Simple Expression of the Thermal Noise Excess Factor for LNA Design

First Near-Ultraviolet- and Blue-Enhanced Backside-Illuminated Single-Photon Avalanche Diode Based on Standard SOI CMOS Technology

Multilevel-Cell Phase-Change Memory: A Viable Technology

A Remotely Powered Implantable Biomedical System With Location Detector

Variability-Aware Design Space Exploration of Embedded Memories

MOS-PN Hybrid Device With Minimum Dark Current for Sensitive Digital Photodetection

Static and dynamic properties of multi-section InGaN-based laser diodes

Convex combination initialization method for kohonen neural network implemented in the CMOS technology

Programmable Triangular Neighborhood Functions of Kohonen Self-Organizing Maps Realized in CMOS Technology

Physically clustered Forward Body Biasing for variability compensation in nanometer CMOS design

DRAM Based on Hysteresis in Impact Ionization Single-Transistor-Latch

Ultra Low Power Subthreshold MOS Current Mode Logic Circuits Using a Novel Load Device Concept