Top-Metal-Only RFIC Retargeting for Fast Specs-To-Silicon Iteration Enabled by AI-Assisted Inverse Design

AI and machine learning (ML) are increasingly used to accelerate Radio-Frequency Integrated Circuit (RFIC) design, where specs-to-layout inverse-design automation can shorten design cycles and lower the expertise barrier. In practice, RFIC turnaround and design migration are constrained not only by iterative EM-driven passive design, but also by layout-to-silicon latency dominated by long fabrication cycles and the cost of full-mask preparation. To address these challenges, this paper presents a fast specs-to-silicon iteration framework for RFIC retargeting by reusing all lower-metal layers that define active devices and tuning elements (e.g., capacitors and resistors), while redesigning EM passives implemented in the reconfigurable top-metal stack above a reference mid-metal layer. We employ an AI-assisted template-seeded approach that enables fast inverse design of multi-metal-layer EM passives. As a proof of concept, two FR3 power amplifiers (PAs) at 13 and 20 GHz are designed in the GlobalFoundries 22 nm FDX+ using top-metal-only routing and pixelated matching networks. PA1 measures an OP1 dB of 18.75–21.74 dBm, a PAEOP1dB of 19.84%–32.65%, a Psat of 19.89–22.13dBm, and a PAEsat of 19.89%–33.66% across 12.5–17 GHz. PA2 measures an OP1 dB of 16.00–17.68 dBm, a PAEOP 1 dB of 18.70%–23.34%, a Psat of 17.70–18.55 dBm, and a PAE sat of 20.45%–24.10% across 19–24 GHz.