AstriFlash: A Flash-Based System for Online Services

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Computer systems rely heavily on abstraction to manage the exponential growth of complexity across hardware and software. Due to practical considerations of compatibility between components of these complex systems across generations, developers have favou ...

Driven by the demand for real-time processing and the need to minimize latency in AI algorithms, edge computing has experienced remarkable progress. Decision-making AI applications stand out for their heavy reliance on data-centric operations, predominantl ...

Shared Virtual Memory (SVM) is a mechanism that allows host-side applications and FPGA accelerators to access the same virtual address space. It enables accelerating algorithms with unpredictable memory access patterns by making transparent pointer sharing ...

Time-domain solutions of Maxwell’s equations in homogeneous and isotropic media are paramount to studying transient or broadband phenomena. However, analytical solutions are generally unavailable for practical applications, while numerical solutions are co ...

In the past decades, a significant increase of the transistor density on a chip has led to exponential growth in computational power driven by Moore's law. To overcome the bottleneck of traditional von-Neumann architecture in computational efficiency, effo ...

Embedded memories occupy an increasingly dominant part of the area and power budgets of modern systems-on-chips (SoCs). Multi-ported embedded memories, commonly used by media SoCs and graphical processing units, occupy even more area and consume higher pow ...

Memory devices have returned to the spotlight due to increasing interest in using in-memory computing architectures to make data-driven algorithms more energy-efficient. One of the main advantages of this architecture is the efficient performance of vector ...

Machine learning and data processing algorithms have been thriving in finding ways of processing and classifying information by exploiting the hidden trends of large datasets. Although these emerging computational methods have become successful in today's ...

Accessing input data is a critical operation in data analytics: i) slow data access significantly degrades performance, and ii) storing everything in the fastest medium, i.e., memory, incurs high operational and hardware costs. Further, while GPUs offer in ...

Virtual Memory (VM) is a critical programming abstraction that is widely used in various modern computing platforms. With the rise of datacenter computing and birth of planet-scale online services, the semantic and capacity requirements from memory have ev ...

By supporting the access of multiple memory words at the same time, Bit-line Computing (BC) architectures allow the parallel execution of bit-wise operations in-memory. At the array periphery, arithmetic operations are then derived with little additional o ...

Modern hardware is increasingly complex, requiring increasing effort to understand in order to carefully engineer systems for optimal performance and effective utilization. Moreover, established design principles and assumptions are not portable to modern ...

Information derived from experiences is incorporated into the brain as changes to ensembles of cells, termed engram cells, which allow memory storage and recall. The mechanism by which those changes hold specific information is unclear. Here, we test the h ...

Analytical engines rely on in-memory data caching to avoid storage accesses and provide timely responses by keeping the most frequently accessed data in memory. Purely frequency- and time-based caching decisions, however, are a proxy of the expected query ...

ML-based edge devices may face memory and computational errors that affect applications' reliability and performance. These errors can be the result of particular working conditions (e.g., radiation areas in physical experiments or avionics) or could be th ...

Gain-cell embedded DRAM (GC-eDRAM) is a high-density logic-compatible alternative to conventional static random-access memory (SRAM) and embedded DRAM (eDRAM). However, GC-eDRAM suffers from a reduced data retention time (DRT) at deeply-scaled process node ...

This short essay illustrates the role of the business archive in the transmission and maintenance of contemporary industrial culture, with a focus on the company town of Dalmine. In the context of Dalmine, the business archive managed by the Fondazione Dal ...

Compute memories are memory arrays augmented with dedicated logic to support arithmetic. They support the efficient execution of data-centric computing patterns, such as those characterizing Artificial Intelligence (AI) algorithms. These architectures can ...

A method of accessing a memory space of a memory device with a decoder, the memory space having faults, including the steps of performing a memory access operation by an electronic device to a access a logical memory space of the memory device, and randomi ...

Utilization of edge devices has exploded in the last decade, with such use cases as wearable devices, autonomous driving, and smart homes. As their ubiquity grows, so do expectations of their capabilities. Simultaneously, their formfactor and use cases lim ...

AstriFlash: A Flash-Based System for Online Services

Chattez avec Graph Search

Secure Interface Design Leveraging Hardware/Software Support

EdgeAI-Aware Design of In-Memory Computing Architectures

FlexiMem: Flexible Shared Virtual Memory for PCIe-attached FPGAs

The time-domain Cartesian multipole expansion of electromagnetic fields

Towards Scalable Electronics: Synthetic 2D Materials for Large-Area 2D Circuit Integration

Multi-Ported GC-eDRAM Bitcell with Dynamic Port Configuration and Refresh Mechanism

How to Achieve Large-Area Ultra-Fast Operation of MoS 2 Monolayer Flash Memories?

2D Nanosystems: Applications of 2D Semiconductors for In-Memory Computing

HetCache: Synergising NVMe Storage and GPU acceleration for Memory-Efficient Analytics

Rebooting Virtual Memory with Midgard

Bit-Line Computing for CNN Accelerators Co-Design in Edge AI Inference

Chaosity: Understanding Contemporary NUMA-architectures

Engram cell connectivity as a mechanism for information encoding and memory function

HPCache: memory-efficient OLAP through proportional caching revisited

Hardware-Software co-design Methodologies for Edge AI Optimization

A 128-kbit GC-eDRAM With Negative Boosted Bootstrap Driver for 11.3x Lower-Refresh Frequency at a 2.5% Area Overhead in 28-nm FD-SOI

When the industry built the city: business archives, memory and community in a contemporary company town

Overflow-free compute memories for edge AI acceleration

Method for reading and writing unreliable memories and a corresponding memory controller device and memory

In-Memory Hardware and Architectural Extensions for Workloads Acceleration