A Sub-VT 2T Gain-Cell Memory for Biomedical Applications

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Formal verification of real-world software systems remains challenging for a number of reasons, including lack of automation, friction in specifying properties, and limited support for the diverse programming paradigms used in industry. In this thesis we m ...

Resistive switching memory technologies (RRAM) are seen by most of the scientific community as an enabler for Edge-level applications such as embedded deep Learning, AI or signal processing of audio and video signals. However, going beyond a "simple'' repl ...

Capabilities are widely used in the design of software systems to ensure security. A system of capabilities can become a mess in the presence of objects and functions: objects may leak capabilities and functions may capture capabilities. They make reasonin ...

Gain-cell embedded DRAM (GC-eDRAM) is an attractive alternative to conventional SRAM due to its high-density, low-leakage, and inherent two-ported functionality. However, its dynamic storage mechanism requires power-hungry refresh cycles to maintain data. ...

We present a new approach for specifying and verifying resource utilization of higher-order functional programs that use lazy evaluation and memoization. In our approach, users can specify the desired resource bound as templates with numerical holes e.g. a ...

In this thesis, we explore techniques for the development and verification of programs in a high-level, expressive, and safe programming language. Our programs can express problems over unbounded domains and over recursive and mutable data structures. We p ...

Routing multiplexers based on pass-transistors or transmission gates are an essential components in many digital integrated circuits. However, whatever structure is employed, CMOS multiplexers have two major limitations: 1) their delay is linearly related ...

This work reports on memory applications of punch-through impact ionization single-transistor latch (PIMOS), showing abrupt current switching (3-10mV/dec.) as well as hysteresis in both ID(VDS) and ID(VGS). A capacitor-less 1PIMOS - 1 MOSFET DRAM memory is ...

A Sub-VT 2T Gain-Cell Memory for Biomedical Applications

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Scaling Language Features for Program Verification

Exploration Methodology for BTI-Induced Failures on RRAM-Based Edge AI Systems

Stoic: Towards Disciplined Capabilities

GC-eDRAM with Body-Bias Compensated Readout and Error Detection in 28nm FD-SOI

Contract-Based Resource Verification for Higher-Order Functions with Memoization

Verification by Reduction to Functional Programs

Circuit Designs of High-Performance and Low-Power RRAM-Based Multiplexers Based on 4T(ransistor)1R(RAM) Programming Structure

DRAM Based on Hysteresis in Impact Ionization Single-Transistor-Latch