Analyzing and comparing the AES architectures for their power consumption

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Publications associées (31)

Programmable frequency-bin quantum states in a nano-engineered silicon device

Matteo Galli, Marco Clementi

Frequency-bin qubits get the best of time-bin and dual-rail encodings, but require external modulators and pulse shapers to build arbitrary states. Here, instead, the authors work directly on-chip by controlling the interference of biphoton amplitudes gene ...

Nature Portfolio2023

Acceleration of Control Intensive Applications on Coarse-Grained Reconfigurable Arrays for Embedded Systems

David Atienza Alonso, Benoît Walter Denkinger, Miguel Peon Quiros

Embedded systems confront two opposite goals: low-power operation and high performance. The current trend to reach these goals is toward heterogeneous platforms, including multi-core architectures with heterogeneous cores and hardware accelerators. The lat ...

2023

Energy-Efficient Electronic Functions Based on the Co-integration of 2D and Ferroelectric Materials

Sadegh Kamaei Bahmaei

The digital revolution has significantly transformed our world over the past decades, driven by the scaling of transistor dimensions and the exponential increase in computation power. However, as the CMOS scaling era approaches its end, the semiconductor i ...

EPFL2023

Radiation Hardness of MALTA2, a Monolithic Active Pixel Sensor for Tracking Applications

Edoardo Charbon, Ashish Sharma, Francesco Piro

MALTA is a depleted monolithic active pixel sensor (DMAPS) developed in the Tower Semiconductor 180-nm CMOS imaging process. Monolithic CMOS sensors offer advantages over current hybrid imaging sensors in terms of both increased tracking performance due to ...

Ieee-Inst Electrical Electronics Engineers Inc2023

Compilation and Design Space Exploration of Dataflow Programs for Heterogeneous CPU-GPU Platforms

Aurélien François Gilbert Bloch

Today's continued increase in demand for processing power, despite the slowdown of Moore's law, has led to an increase in processor count, which has resulted in energy consumption and distribution problems. To address this, there is a growing trend toward ...

EPFL2023

An Open-Hardware Coarse-Grained Reconfigurable Array for Edge Computing

Ruben Rodriguez, David Atienza Alonso, Benoît Walter Denkinger, Giovanni Ansaloni, José Angel Miranda Calero, Juan Pablo Sapriza Araujo, Rubén Rodríguez Álvarez

In this work, we propose an open-hardware low-power coarse-grained reconfigurable array connected to a lightweight microcontroller and enclosed in an application mapping framework. The latter provides complete support to configure kernels in the reconfigur ...

2023

DFAulted: Analyzing and Exploiting CPU Software Faults Caused by FPGA-Driven Undervolting Attacks

Mirjana Stojilovic, David Dervishi, Dina Gamaleldin Ahmed Shawky Mahmoud

Field-programmable gate arrays (FPGAs) combine hardware reconfigurability with a high degree of parallelism. Consequently, FPGAs offer performance gains and power savings for many applications. A recent trend has been to leverage the hardware versatility o ...

2022

Assessment of the Bundle SNSPD Plus FPGA-Based TDC for High-Performance Time Measurements

Christophe Marcel Georges Galland, Andrea Costa, Santiago Tarrago Velez

Counting single photons and measuring their arrival time is of crucial importance for imaging and quantum applications that use single photons to outperform classical techniques. The investigation of the coincidence, i.e. correlation, between photons can b ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2022

Optimal Symmetric Ratcheting for Secure Communication

Serge Vaudenay, Andrea Felice Caforio, Daniel Patrick Collins, Hailun Yan

To mitigate state exposure threats to long-lived instant messaging sessions, ratcheting was introduced, which is used in practice in protocols like Signal. However, existing ratcheting protocols generally come with a high cost. Recently, Caforio et al. pro ...

OXFORD UNIV PRESS2022

FPGA-to-CPU Undervolting Attacks

Mirjana Stojilovic, Dina Gamaleldin Ahmed Shawky Mahmoud

FPGAs are proving useful and attractive for many applications, thanks to their hardware reconfigurability, low power, and high-degree of parallelism. As a result, modern embedded systems are often based on systems-on-chip (SoCs), where CPUs and FPGAs share ...

IEEE2022

VWR2A: A Very-Wide-Register Reconfigurable-Array Architecture for Low-Power Embedded Devices

David Atienza Alonso, Benoît Walter Denkinger, Miguel Peon Quiros

Edge-computing requires high-performance energy-efficient embedded systems. Fixed-function or custom accelerators, such as FFT or FIR filter engines, are very efficient at implementing a particular functionality for a given set of constraints. However, the ...

ASSOC COMPUTING MACHINERY2022

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