Analyzing and comparing the AES architectures for their power consumption

Chat with Graph Search

Ask any question about EPFL courses, lectures, exercises, research, news, etc. or try the example questions below.

DISCLAIMER: The Graph Chatbot is not programmed to provide explicit or categorical answers to your questions. Rather, it transforms your questions into API requests that are distributed across the various IT services officially administered by EPFL. Its purpose is solely to collect and recommend relevant references to content that you can explore to help you answer your questions.

Frequency-bin qubits get the best of time-bin and dual-rail encodings, but require external modulators and pulse shapers to build arbitrary states. Here, instead, the authors work directly on-chip by controlling the interference of biphoton amplitudes gene ...

Embedded systems confront two opposite goals: low-power operation and high performance. The current trend to reach these goals is toward heterogeneous platforms, including multi-core architectures with heterogeneous cores and hardware accelerators. The lat ...

The digital revolution has significantly transformed our world over the past decades, driven by the scaling of transistor dimensions and the exponential increase in computation power. However, as the CMOS scaling era approaches its end, the semiconductor i ...

MALTA is a depleted monolithic active pixel sensor (DMAPS) developed in the Tower Semiconductor 180-nm CMOS imaging process. Monolithic CMOS sensors offer advantages over current hybrid imaging sensors in terms of both increased tracking performance due to ...

Today's continued increase in demand for processing power, despite the slowdown of Moore's law, has led to an increase in processor count, which has resulted in energy consumption and distribution problems. To address this, there is a growing trend toward ...

In this work, we propose an open-hardware low-power coarse-grained reconfigurable array connected to a lightweight microcontroller and enclosed in an application mapping framework. The latter provides complete support to configure kernels in the reconfigur ...

Field-programmable gate arrays (FPGAs) combine hardware reconfigurability with a high degree of parallelism. Consequently, FPGAs offer performance gains and power savings for many applications. A recent trend has been to leverage the hardware versatility o ...

Counting single photons and measuring their arrival time is of crucial importance for imaging and quantum applications that use single photons to outperform classical techniques. The investigation of the coincidence, i.e. correlation, between photons can b ...

To mitigate state exposure threats to long-lived instant messaging sessions, ratcheting was introduced, which is used in practice in protocols like Signal. However, existing ratcheting protocols generally come with a high cost. Recently, Caforio et al. pro ...

FPGAs are proving useful and attractive for many applications, thanks to their hardware reconfigurability, low power, and high-degree of parallelism. As a result, modern embedded systems are often based on systems-on-chip (SoCs), where CPUs and FPGAs share ...

Edge-computing requires high-performance energy-efficient embedded systems. Fixed-function or custom accelerators, such as FFT or FIR filter engines, are very efficient at implementing a particular functionality for a given set of constraints. However, the ...

SNOW-V is a stream cipher proposed by Ekdahl et al. at IACR ToSC 2019(3) with an objective to be deployed as the encryption primitive in 5G systems. The stream cipher offers 256-bit security and is ready for deployment in the post-quantum era, in which as ...

Analyzing and comparing the AES architectures for their power consumption

Chat with Graph Search

Programmable frequency-bin quantum states in a nano-engineered silicon device

Acceleration of Control Intensive Applications on Coarse-Grained Reconfigurable Arrays for Embedded Systems

Energy-Efficient Electronic Functions Based on the Co-integration of 2D and Ferroelectric Materials

Radiation Hardness of MALTA2, a Monolithic Active Pixel Sensor for Tracking Applications

Compilation and Design Space Exploration of Dataflow Programs for Heterogeneous CPU-GPU Platforms

An Open-Hardware Coarse-Grained Reconfigurable Array for Edge Computing

DFAulted: Analyzing and Exploiting CPU Software Faults Caused by FPGA-Driven Undervolting Attacks

Assessment of the Bundle SNSPD Plus FPGA-Based TDC for High-Performance Time Measurements

Optimal Symmetric Ratcheting for Secure Communication

FPGA-to-CPU Undervolting Attacks

VWR2A: A Very-Wide-Register Reconfigurable-Array Architecture for Low-Power Embedded Devices

Melting SNOW-V: improved lightweight architectures