Publications associées à A 1.8V 12-bit 230-MS/s pipeline ADC in 0.18um CMOS technology

Publications associées (32)

Enhanced feedback performance in off-resonance AFM modes through pulse train sampling

Georg Fantner, Marcos Penedo Garcia, Santiago Harald Andany, Mustafa Kangül, Navid Asmari Saadabad

Dynamic atomic force microscopy (AFM) modes that operate at frequencies far away from the resonance frequency of the cantilever (off-resonance tapping (ORT) modes) can provide high-resolution imaging of a wide range of sample types, including biological sa ...

Beilstein-Institut2024

A 1-GS/s 6-8-b Cryo-CMOS SAR ADC for Quantum Computing

Edoardo Charbon

This article presents a two-times interleaved, loop-unrolled SAR analog-to-digital converter (ADC) operational from 300 down to 4.2 K. The 6-8-bit resolution and the sampling speed up to 1 GS/s are targeted at digitizing the multi-channel frequency-multipl ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2023

Vibrational NDT with Under-sampled Data through Physics-informed Neural Networks

Olga Fink

The vibrational response of solid materials and structural components is substantially governed by their mechanical and geometrical properties. Low-frequency vibrations and modal frequencies are sensitive to global geometrical deviations, while high-freque ...

2023

Electronic readout of DNA amplification in nanoliter chambers. Strategies towards highly parallel semiconductor-based nucleic acid amplification testing

Saurabh Tomar

Polymerase chain reaction (PCR) has been the most significant driver in the field of nucleic acid testing (NAT) since its invention. Popularized as an abbreviation by the Covid-19 pandemic, PCR-based methods are the gold standard in the field of diagnostic ...

EPFL2023

An 8-Bit 800 MS/s Loop-Unrolled SAR ADC With Common-Mode Adaptive Background Offset Calibration in 28 nm FDSOI

Yusuf Leblebici, Firat Çelik, Ayça Akkaya

This paper presents a low-power single-channel 8-bit loop-unrolled (LU) successive approximation register (SAR) analog-to-digital-converter (ADC) with a novel common-mode adaptive background comparator offset calibration scheme. LU-SAR ADCs use multiple co ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2021

High-Speed ADC Design and Optimization for Wireline Links

Ayça Akkaya

The ever-growing global internet traffic has increased demand for higher speed data transmission. As the bandwidth requirements of wireline links increase, extensive digital equalization techniques are required to compensate for the high-frequency channel ...

EPFL2021

Low Noise Clock Generation: Modeling, Analysis and Implementation

Duygu Kostak

The aim of this thesis is to implement, analyze and improve the selected low noise clock generation and distribution techniques for ADC implementations. The thesis is divided into two parts. The first part focuses on the sampling phase generation and distr ...

EPFL2021

Uncertain Sampling with Certain Priors

Golnooshsadat Elhami

Sampling has always been at the heart of signal processing providing a bridge between the analogue world and discrete representations of it, as our ability to process data in continuous space is quite limited. Furthermore, sampling plays a key part in unde ...

EPFL2021

Adaptive Body Biasing in Strong Body Factor Technologies

Thomas Christoph Müller

With the advent of intelligent sensor nodes in everyday life, low power aspects of system design become more and more important. Adaptive body biasing is a promising methodology to achieve dynamic adaptation of the tradeoff between performance and energy b ...

EPFL2021

An Event-Based System for Low-Power ECG QRS Complex Detection

David Atienza Alonso, Tomas Teijeiro Campo, Silvio Zanoli

One of the greatest challenges in the design of modern wearable devices is energy efficiency. While data processing and communication have received a lot of attention from the industry and academia, leading to highly efficient microcontrollers and transmis ...

IEEE2020

Accelerated MP2RAGE imaging using Cartesian phyllotaxis readout and compressed sensing reconstruction

Émilie Priscille Claire Mussard, Jean-Philippe Thiran, Reto Meuli, Tobias Kober, Tom Hilbert

Purpose MP2RAGE T-1-weighted imaging has been shown to be beneficial for various applications, mainly because of its good grey-white matter contrast, its B-1-robustness and ability to derive T(1)maps. Even using parallel imaging, the method requires long a ...

WILEY2020

CPGD: Cadzow Plug-and-Play Gradient Descent for Generalised FRI

Martin Vetterli, Paul Hurley, Matthieu Martin Jean-André Simeoni, Adrien Georges Jean Besson

Finite rate of innovation (FRI) is a powerful reconstruction framework enabling the recovery of sparse Dirac streams from uniform low-pass filtered samples. An extension of this framework, called generalised FRI (genFRI), has been recently proposed for han ...

2020

A Low-Power 9-Bit 222 MS/s Asynchronous SAR ADC in 65 nm CMOS

Yusuf Leblebici, Firat Çelik, Ayça Akkaya

This paper presents a 9-bit 222 MS/s low-power asynchronous single-bit/cycle successive approximation register (SAR) ADC. The SAR ADC combines techniques such as asynchronous clocking, binary-weighted custom-designed capacitive DAC with small unit capacito ...

IEEE2020

Sampling and Reconstruction of Bandlimited Signals with Multi-Channel Time Encoding

Martin Vetterli, Adam James Scholefield, Karen Adam

Sampling is classically performed by recording the amplitude of the input at given time instants; however, sampling and reconstructing a signal using multiple devices in parallel becomes a more difficult problem to solve when the devices have an unknown sh ...

2020

Compressed sensing with signal averaging for improved sensitivity and motion artifact reduction in fluorine-19 MRI

Tobias Kober, Tom Hilbert, Ruud van Heeswijk, Jérôme Yerly

Fluorine-19 (F-19) MRI of injected perfluorocarbon emulsions (PFCs) allows for the non-invasive quantification of inflammation and cell tracking, but suffers from a low signal-to-noise ratio and extended scan time. To address this limitation, we tested the ...

WILEY2020

Multiplier Architectures: Challenges and Opportunities with Plasmonic-based Logic

Giovanni De Micheli, Mathias Soeken, Eleonora Testa

Emerging technologies such as plasmonics and photonics are promising alternatives to CMOS for high throughput applications, thanks to their waveguide's low power consumption and high speed of computation. Besides these qualities, these novel technologies a ...

2020

On the 2D Post-Processing of Brillouin Optical Time-Domain Analysis

Luc Thévenaz, Zhisheng Yang, Simon Adrien Zaslawski

The benefits and limitations inherent to the 2D post-processing of measurements from Brillouin optical time-domain analyzers are investigated from a fundamental point of view. In a preliminary step, the impact of curve fitting on the precision of the estim ...

IEEE Institute of Electrical and Electronics Engineers2020

Aliasing mitigation in optical microscopy of dynamic biological samples by use of temporally modulated color illumination and a standard RGB camera

Michael Stefan Daniel Liebling, Christian Jaques

Significance: Despite recent developments in microscopy, temporal aliasing can arise when imaging dynamic samples. Modern sampling frameworks, such as generalized sampling, mitigate aliasing but require measurement of temporally overlapping and potentially ...

SPIE Society of Photo-optical Instrumentation Engineers2020

A 49 mu W 6th-Order Chebyshev SSF-based Low-Pass Analog Filter for IEEE 802.11ax

Christian Enz, Alessandro Pezzotta, Daniel Mathias Bold

In this paper a continuous-time low-pass analog filter based on the Cascoded Super Source Follower (C-SSF) architecture, implemented in a 28-nm bulk CMOS process, is presented. The target application is the transceiver analog baseband for the next-generati ...

IEEE2020

Coss Loss Tangent of Field-Effect Transistors: Generalizing High-Frequency Soft-Switching Losses

Elison de Nazareth Matioli, Luca Nela, Armin Jafari, Mohammad Samizadeh Nikooytabalvandani, Palliyage Srilak Nirmana Perera

The dissipated energy (Ediss) related to the resonant charging/discharging of a transistor output capacitance, becomes a dominant loss factor for power converters operating in the MHz range. A recent work has introduced a small-signal measurement method to ...

2020