Publications de Giovanni Ansaloni

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Recent advances in machine learning have dramatically increased model size and computational requirements, increasingly straining computing system capabilities. This tension is particularly acute for resource-constrained edge scenarios, for which careful h ...

Coarse-Grained Reconfigurable Arrays (CGRAs) are a programmable architectural solution that efficiently supports the execution of computation-intensive application functions (kernels). Compilers for CGRAs typically focus on optimizing the mapping of single ...

The increasing complexity of transformer models in artificial intelligence expands their computational costs, memory usage, and energy consumption. Hardware acceleration tackles the ensuing challenges by designing processors and accelerators tailored for t ...

Epilepsy, a major neurological disease, requires careful diagnosis and treatment. However, the detection of epileptic seizures remains a significant challenge. Current clinical practice relies on expert analysis of EEG signals, a process that is time-consu ...

Background and Objective: Event-based analog-to-digital converters allow for sparse bio-signal acquisition, enabling local sub-Nyquist sampling frequency. However, aggressive event selection can cause the loss of important bio-markers, not recoverable with ...

Due to stringent energy and performance constraints, edge AI computing often employs heterogeneous systems that utilize both general-purpose CPUs and accelerators. Analog in-memory computing (AIMC) is a well-known AI inference solution that overcomes compu ...

Compute memories are memory arrays augmented with dedicated logic to support arithmetic. They support the efficient execution of data-centric computing patterns, such as those characterizing Artificial Intelligence (AI) algorithms. These architectures can ...

Smart Wireless Body Sensor Nodes (WBSNs) are a novel class of unobtrusive, battery-powered devices allowing the continuous monitoring and real-time interpretation of a subject's bio-signals, such as the electrocardiogram (ECG). These low-power platforms, w ...

Codebook-based optimizations are a class of algorithmic-level transformations able to effectively reduce the computing and memory requirements of Convolutional Neural Networks (CNNs). This approach tightly limits the number of unique weights in each layer, ...

Compressed Sensing (CS) is a new acquisition- compression paradigm for low-complexity energy-aware sensing and compression. By merging both sampling and compression, CS is very promising to develop practical ultra-low power read- out systems for wireless b ...

This paper introduces an inexact, but ultra-low power, computing architecture devoted to the embedded analysis of bio-signals. The platform operates at extremely low voltage supply levels to minimize energy consumption. In this scenario, the reliability of ...

As the demand for high channel counts and high-resolution recordings of neural activity continues to grow, the increased power and data rate generated impose hard constraints on the telemetry capabilities of wireless implantable neural interfaces. To addre ...

State-of-the-art Artificial Intelligence (AI) algorithms, such as graph neural networks and recommendation systems, require floating-point computation of very large matrix multiplications over sparse data. Their execution in resource-constrained scenarios, ...

Wireless sensor nodes (WSNs) have recently evolved to include a fair amount of computational power, so that advanced signal processing algorithms can now be embedded even in this extremely low-power platforms. An increasingly successful field of applicatio ...

The energy efficiency of digital architectures is tightly linked to the voltage level (Vdd) at which they operate. Aggressive voltage scaling is therefore mandatory when ultra-low power processing is required. Nonetheless, the lowest admissible Vdd is ofte ...

Multi-Chiplet architectures are being increasingly adopted to support the design of very large systems in a single package, facilitating the integration of heterogeneous components and improving manufacturing yield. However, chiplet-based solutions have to ...

This paper presents the system-level architecture of novel ultra-low power wireless body sensor nodes (WBSNs) for real-time cardiac monitoring and analysis, and discusses the main design challenges of this new generation of medical devices. In particular, ...

Wearable devices for health monitoring are essential for tracking individuals' health status and facilitating early detection of diseases. However, processing biomedical signals online for real-time monitoring is challenging due to limited computational re ...

When arranged in a crossbar configuration, resistive memory devices can be used to execute Matrix-Vector Multiplications (MVMs), the most dominant operation of many Machine Learning (ML) algorithms, in constant time complexity. Nonetheless, when performing ...

Giovanni Ansaloni

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Keep All in Memory with Maxwell: a Near-SRAM Computing Architecture for Edge AI Applications

An MLIR-based Compilation Framework for CGRA Application Deployment

Accelerator-driven Data Arrangement to Minimize Transformers Run-time on Multi-core Architectures

Resource-Efficient Continual Learning for Personalized Online Seizure Detection

Event-based sampled ECG morphology reconstruction through self-similarity

Which Coupled is Best Coupled? An Exploration of AIMC Tile Interfaces and Load Balancing for CNNs

Overflow-free Compute Memories for Edge AI Acceleration

Early Classification of Pathological Heartbeats on Wireless Body Sensor Nodes

An Accuracy-Driven Compression Methodology to Derive Efficient Codebook-Based CNNs

Power-Efficient Joint Compressed Sensing of Multi-Lead ECG Signals

Inexact-Aware Architecture Design for Ultra-Low Power Bio-Signal Analysis

A Reconfigurable High Dynamic Range Delta-Sigma Front End with Event-Based Decimation for Bandwidth-EfficientImplantable Neural Interfaces

A 16-bit Floating-Point Near-SRAM Architecture for Low-power Sparse Matrix-Vector Multiplication

Embedded Real-Time ECG Delineation Methods: a Comparative Evaluation

An Inexact Ultra-low Power Bio-signal Processing Architecture With Lightweight Error Recovery

System-Level Exploration of In-Package Wireless Communication for Multi-Chiplet Platforms

Ultra-Low Power Design of Wearable Cardiac Monitoring Systems

ACE: Automated optimization towards iterative Classification in Edge health monitors

A Reconfigurable High-Dynamic Range ∆Σ Front-End with Event-Based Decimation for Bandwidth-Efficient Implantable Neural Interfaces

LIONHEART: A Layer-based Mapping Framework for Heterogeneous Systems with Analog In-Memory Computing Tiles