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Pierre-Emmanuel Julien Marc Gaillardon

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Publications associées (119)

A High-performance FPGA Architecture Using One-Level RRAM-based Multiplexers

Giovanni De Micheli, Xifan Tang, Pierre-Emmanuel Julien Marc Gaillardon

Resistive Random Access Memory (RRAM)-based routing multiplexers, built using a one-level structure, are significantly more delay efficient than state-of-art SRAM-based implementations thanks to their lower achievable on-state resistance. In addition, the ...

2017

Enabling exact delay synthesis

Giovanni De Micheli, Luca Gaetano Amarù, Pierre-Emmanuel Julien Marc Gaillardon, Mathias Soeken

Given (i) a Boolean function, (ii) a set of arrival times at the inputs, and (iii) a gate library with associated delay values, the exact delay synthesis problem asks for a circuit implementation which minimizes the arrival time at the output(s). The exact ...

IEEE2017

Endurance Management for Resistive Logic-In-Memory Computing Architectures

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Mathias Soeken

Resistive Random Access Memory (RRAM) is a promising non-volatile memory technology which enables modern in-memory computing architectures. Although RRAMs are known to be superior to conventional memories in many aspects, they suffer from a low writ ...

Ieee2017

Improving Circuit Mapping Performance Through MIG-based Synthesis for Carry Chains

Paolo Ienne, Giovanni De Micheli, Ana Petkovska, Grace Zgheib, Luca Gaetano Amarù, Xifan Tang, Pierre-Emmanuel Julien Marc Gaillardon, Mathias Soeken, Zhufei Chu

Hard-wired carry chains in FPGAs are designed to improve efficiency of important arithmetic primitives. Although they are proven to be effective for arithmetic-rich functions, there are very few studies on the optimization opportunities of carry chains for ...

ACM2017

Exact Synthesis of Majority-Inverter Graphs and Its Applications

Giovanni De Micheli, Luca Gaetano Amarù, Pierre-Emmanuel Julien Marc Gaillardon, Mathias Soeken

We propose effective algorithms for exact synthesis of Boolean logic networks using satisfiability modulo theories (SMT) solvers. Since exact synthesis is a difficult problem, it can only be applied efficiently to very small functions, having up to 6 varia ...

Ieee-Inst Electrical Electronics Engineers Inc2017

A PLiM Computer for the Internet of Things

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Mathias Soeken

Emerging applications are dramatically changing computer architecture requirements, with a shift toward big data that is processed using simple computations. A programmable logic-in-memory (PLiM) computer can allow memory cells to perform primitive logic o ...

2017

A Novel Basis for Logic Rewriting

Giovanni De Micheli, Luca Gaetano Amarù, Pierre-Emmanuel Julien Marc Gaillardon, Winston Jason Haaswijk, Mathias Soeken

Given a set of logic primitives and a Boolean function, exact synthesis finds the optimum representation (e.g., depth or size) of the function in terms of the primitives. Due to its high computational complexity, the use of exact synthesis is limite ...

Ieee2017

Operation regimes and electrical transport of steep slope Schottky Si-FinFETS

Giovanni De Micheli, Jian Zhang, Pierre-Emmanuel Julien Marc Gaillardon

In the quest for energy efficient circuits, considerable focus has been given to steep slope and polarity-controllable devices, targeting low supply voltages and reduction of transistor count. The recently proposed concept of the three-independent gated Si ...

2017

RM3 based logic synthesis

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Mathias Soeken

In-memory computing devices, such as resistive RAMs, natively implement material implication or a variant of the majority-of-three operation called RM3. This operation generalizes material implication and has been used as target operation in sev ...

IEEE2017

Wave Pipelining for Majority-based Beyond-CMOS Technologies

Giovanni De Micheli, Luca Gaetano Amarù, Odysseas Zografos, Pierre-Emmanuel Julien Marc Gaillardon, Eleonora Testa, Mathias Soeken

The performance of some emerging nanotechnolo- gies benefits from wave pipelining. The design of such circuits re- quires new models and algorithms. Thus we show how Majority- Inverter Graphs (MIG) can be used for this purpose and we extend the related opt ...

2017

Effect of O2 migration in Pt/HfO2/Ti/Pt structure

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Maxime Victor Thammasack

In this paper, we study the post-fabrication phenomenon of natural oxidation of the Ti layer observed in a Pt/HfO2/Ti/Pt Resistive Random Access Memory (OxRRAM) stack with no external influence. We identify that the resistance ratio decreases by ...

Springer Verlag2017

An Efficient Electronic Measurement Interface for Memristive Biosensors

Giovanni De Micheli, Sandro Carrara, Pierre-Emmanuel Julien Marc Gaillardon, Ioulia Tzouvadaki, Armando Biscontini, Sébastien Naus

Reducing sensing time is one major concern in clinical diagnostics. In the present work, a robust measurement system is developed aiming at the faster and easier signal acquisition of memristive biosensors. Sensing chips consisting of nanofabricated silico ...

IEEE2017

Control of Resistive Switching in Mott Memories Based on TiN/AM4Q8/TiN MIM Devices

Giovanni De Micheli, Davide Sacchetto, Jury Sandrini, Pierre-Emmanuel Julien Marc Gaillardon

The family of AM4Q8 chalcogenide Mott insulators gained attention in recent years for its application opportunities. Here, we explore and validate the resistive switching mechanism of thin-film of GaV4S8 sandwich ...

Electrochemical Society2017

Scaling trends and performance evaluation of 2-dimensional polarity-controllable FETs

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Giovanni Vincenzo Resta

Two-dimensional semiconducting materials of the transition-metal-dichalcogenide family, such as MoS2 and WSe2, have been intensively investigated in the past few years, and are considered as viable candidates for next-generation elect ...

Nature Research2017

Efficient Statistical Parameter Selection for Nonlinear Modeling of Process/Performance Variation

Giovanni De Micheli, Hassan Ghasemzadeh Mohammadi, Pierre-Emmanuel Julien Marc Gaillardon

With the growing number of process variation sources in deeply nano-scaled technologies, parameterized device and circuit modeling is becoming very important for chip design and verification. However, the high dimensionality of parameter space, for process ...

Ieee-Inst Electrical Electronics Engineers Inc2016

A Sound and Complete Axiomatization of Majority-n Logic

Giovanni De Micheli, Luca Gaetano Amarù, Pierre-Emmanuel Julien Marc Gaillardon, Anupam Chattopadhyay

Manipulating logic functions via majority operators recently drew the attention of researchers in computer science. For example, circuit optimization based on majority operators enables superior results as compared to traditional logic systems. Also, the B ...

Institute of Electrical and Electronics Engineers2016

The Programmable Logic-in-Memory (PLiM) Computer (Invited)

Giovanni De Micheli, Luca Gaetano Amarù, Pierre-Emmanuel Julien Marc Gaillardon, Anupam Chattopadhyay

Realization of logic and storage operations in memristive circuits have opened up a promising research direction of in-memory computing. Elementary digital circuits, e.g., Boolean arithmetic circuits, can be economically realized within memristive circuits ...

Ieee2016

Boolean logic optimization in majority-inverter graphs

Giovanni De Micheli, Luca Gaetano Amarù, Pierre-Emmanuel Julien Marc Gaillardon

We present a Boolean logic optimization framework based on Majority-Inverter Graph (MIG). An MIG is a directed acyclic graph consisting of three-input majority nodes and regular/complemented edges. Current MIG optimization is supported by a consistent alge ...

2016

A Study on the Programming Structures for RRAM-based FPGA Architectures

Giovanni De Micheli, Gain Kim, Xifan Tang, Pierre-Emmanuel Julien Marc Gaillardon

Field Programmable Gate Arrays (FPGAs) can benefit non-volatility and high-performance by exploiting Resistive Random Access Memories (RRAMs). In RRAM-based FPGAs, the memories do not only replace the SRAMs and store configurations, but they can also repla ...

Ieee-Inst Electrical Electronics Engineers Inc2016

Computationally Efficient Multiple-Independent-Gate Device Model

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Gianluca Piccinini, Mariagrazia Graziano

Nanowire Field Effect Transistors (FETs) with multiple independent gates around a silicon channel feature ultimate gate control and are regarded as promising candidates for next generation transistors. Being inherently more complex than conventional gate-a ...

Institute of Electrical and Electronics Engineers2016

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