Giovanni De MicheliExpertise
Technologies de conception pour les systèmes intégrés, tels que la synthèse, le codesign de HW/SW et la conception de basse puissance. Technologies de conception des systèmes sur les plateformes hétérogènes comprenant les composants électriques, et biologiques.
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Consulter svp http://si2.epfl.ch/~demichel/
Enseignement et PhD A dirigé les thèses EPFL de Abhishek Garg, Mohamed Haykel Ben Jamaa, Francesco Zanini, Ciprian Seiculescu, Cristina Boero, Hu Xu, Andrea Cavallini, Shashi Kanth Alexandre SchmidEnseignement et PhD A dirigé les thèses EPFL de Mahsa Shoaran, Wen-Yang Hsu, Reza Ranjandish, Keyvan Farhang Razi, Mohammad Javad Karimi A co-dirigé les thèses EPFL de Milos Stanisavljevic, Neil Joye, Vahid Majidzadeh Bafar, Hossein Afshari, Nikola Katic, Abdulkadir Akin Cours Analog circuits for biochip EE-518 Introduction à la conception analogique CMOS pour des biocapteurs à distance sur puce. Compréhension et la conception de systèmes de biocapteurs actifs et alimentés à distance. Compré
Alireza MafiExpertise
Théorie de l'électromagnétismeAntennes et Micro-ondesCircuits Intégrés de RadiofréquenceRéseaux PhasésBioélectronique
Expertise
Théorie de l'électromagnétismeAntennes et Micro-ondesCircuits Intégrés de RadiofréquenceRéseaux PhasésBioélectronique
Je suis doctorant en Génie électrique à l'école Polytechnique Fédérale de Lausanne (EPFL). J'ai obtenu mon Master en Génie électrique (Communications Micro-ondes et Optiques) à l'Université de Technologie de Sharif, Téhéran, Iran, en 2022. J'ai également t
Emma Christine Joelle LarceletEmma Larcelet est architecte et doctorante au Laboratoire des Arts pour les Science (LAPIS), où elle enseigne et étudie les interactions entre la représentation architecturale et les technologies numériques. Elle dirige actuellement son projet de recherche doctorale, Analog and Digital: Addressing the Continuity of Architectural Drawing Practice in the Design Process, financé par le Fonds National Suisse de la recherche scientifique (FNS), sous la direction du Prof. Nicola Braghieri (LAPIS, EPFL) et la codi
Pierre-André FarinePierre-André Farine received the Doctoral and Engineering Degrees in Microtechnology from University of Neuchâtel, Switzerland, respectively in 1984 and 1978, and the Engineering in Microtechnology from ETS Le Locle in 1974.
He was working 17 years for the Swiss watch industries (Swatch Group), including developments for high-tech products, such as pager watches, watches including integrated sensors such as pressure, compass, altimeter and temperature sensors for Tissot. He was also involved in prototypes developments for watches including GPS and cellular GSM phones.
Since 8 years, he is Professor in Electronics and Signal Processing at the Institute of Microtechnology IMT, University of Neuchâtel, Switzerland. Full professor at EPFL since January 1st, 2009, he works in the field of low-power integrated products for portable devices, including microelectronics for wireless telecommunications, UWB and GNSS systems. He is Head of the Electronics and Signal Processing Laboratory ESPLAB of the EPFL IMT-NE. His laboratory works also for video and audio compression algorithms and their implementation in low power integrated circuits.
Paolo IennePaolo Ienne has been a Professor at the EPFL since 2000 and heads the Processor Architecture Laboratory (LAP). Prior to that, he worked for the Semiconductors Group of Siemens AG, Munich, Germany (which later became Infineon Technologies AG) where he was at the head of the Embedded Memories unit in the Design Libraries division. His research interests include various aspects of computer and processor architecture, FPGAs and reconfigurable computing, electronic design automation, and computer arithmetic. Ienne was a recipient of Best Paper Awards at the 20th, 24th, and 28th ACM/SIGDA International Symposia on Field-Programmable Gate Arrays (FPGA), in 2012, 2016 and 2020, at the 19th and 30th International Conference on Field-Programmable Logic and Applications (FPL), in 2009 and 2020, at the International Conference on Compilers, Architectures, and Synthesis for Embedded Systems (CASES), in 2007, and at the 40th Design Automation Conference (DAC), in 2003; many other papers have been candidates to Best Paper Awards in prestigious venues. He has served as general, programme, and topic chair of renown international conferences, including organizing in Lausanne the 26th International Conference on Field-Programmable Logic and Applications (FPL) in 2016. He serves on the steering committee of the IEEE Symposium on Computer Arithmetic (ARITH) and of the International Conference on Field-Programmable Logic and Applications (FPL). Ienne has guest edited a number of special issues and special sections on various topics for IEEE and ACM journals. He is regularly member of program committees of international workshops and conferences in the areas of design automation, computer architecture, embedded systems, compilers, FPGAs, and asynchronous design. He has been an associate editor of ACM Transactions on Architecture and Code Optimization (TACO), since 2015, of ACM Computing Surveys (CSUR), since 2014, and of ACM Transactions on Design Automation of Electronic Systems (TODAES) from 2011 to 2016.
David Atienza AlonsoDavid Atienza Alonso is an associate professor of EE and director of the Embedded Systems Laboratory (ESL) at EPFL, Switzerland. He received his MSc and PhD degrees in computer science and engineering from UCM, Spain, and IMEC, Belgium, in 2001 and 2005, respectively. His research interests include system-level design methodologies for multi-processor system-on-chip (MPSoC) servers and edge AI architectures. Dr. Atienza has co-authored more than 350 papers, one book, and 12 patents in these previous areas. He has also received several recognitions and award, among them, the ICCAD 10-Year Retrospective Most Influential Paper Award in 2020, Design Automation Conference (DAC) Under-40 Innovators Award in 2018, the IEEE TCCPS Mid-Career Award in 2018, an ERC Consolidator Grant in 2016, the IEEE CEDA Early Career Award in 2013, the ACM SIGDA Outstanding New Faculty Award in 2012, and a Faculty Award from Sun Labs at Oracle in 2011. He has also earned two best paper awards at the VLSI-SoC 2009 and CST-HPCS 2012 conference, and five best paper award nominations at the DAC 2013, DATE 2013, WEHA-HPCS 2010, ICCAD 2006, and DAC 2004 conferences. He serves or has served as associate editor of IEEE Trans. on Computers (TC), IEEE Design & Test of Computers (D&T), IEEE Trans. on CAD (T-CAD), IEEE Transactions on Sustainable Computing (T-SUSC), and Elsevier Integration. He was the Technical Program Chair of DATE 2015 and General Chair of DATE 2017. He served as President of IEEE CEDA in the period 2018-2019 and was GOLD member of the Board of Governors of IEEE CASS from 2010 to 2012. He is a Distinguished Member of ACM and an IEEE Fellow.
Sophie LufkinFORMATION
2010 - Thèse de doctorat au sein de l'EDAR (Ecole doctorale Architecture, Ville, Histoire) sur la densification des friches ferroviaires, co-dirigée par les Prof. Inès Lamunière et Vincent Kaufmann
2005 - "Master of Art" en architecture, sous la direction des Prof. Patrick BERGER et Inès LAMUNIERE
2003 - Année d'échange à l'ETHZ
1999 - Entrée à l'EPFL, section architecture
1998 - Maturité type B, Collège Claparède, Genève
EXPERIENCE PROFESSIONNELLE
2010 - Architecte, Cheffe de projet chez LAR - Fernando Romero, México
2006 - Assistante de recherche à lEPFL au Laboratoire darchitecture et mobilité urbaine (LAMU), projet de recherche PNR54 "Densification des friches ferroviaires"
2005 - Architecte chez Devanthéry & Lamunière, Genève
2004 - Stage darchitecture, Eric Maria, Genève
2003 - Stage darchitecture, Sumi & Burkhalter, Zurich
2001 - Stage darchitecture, Devanthéry & Lamunière, Genève
RECOMPENSES ET BOURSES
2001 - Prix SIA Vaudoise pour le projet "Fondation Ella Maillart à Chandolin"
2005 - Prix de l'Association des diplômes A3-EPFL
2008 - Bourse Erna Hamburger
LANGUES
Français (maternelle), allemand et anglais (courantes), portugais (notions)
Tobias KippenbergEnseignement et PhD Doctorant·es actuel·les Mengxin Lin, Xinru Ji, Shuhang Zheng, Junyin Zhang, Zhuoya Yuan, Evgenii Guzovskii, Mahdi Chegnizadeh, Jiale Sun, Shivaprasad Umesh Hulyal, Xiaoyi Cheng, Hao Li, Nikolai Kuznetsov, Alessio Zicoschi, Jiahe Pan, Mikael Sebastian Reichler, Xuxin Wang, Donato Manuel Jiménez Benetó, Xuan Yang, Hugo Paul Arbez, Amirali Arabmoheghi, Viacheslav Snigirev, Alisa Davydova, Zihan Li, Giovanni Scarioni A dirigé les thèses EPFL de Stefan Weis, Emanuel Gavartin, Xiaoqing Zhou,
Pejman Lotfi KamranEnseignement et PhD Cours Advanced multiprocessor architecture CS-471 Les multiprocesseurs sont à la base des systèmes informatiques. Ce cours couvre l'architecture et l'organisation des multiprocesseurs modernes, des accélérateurs prévalents (GPU, TPU, etc.) et des datacenters. Il comprend un projet de recherche sur les multiprocesseurs et les datacenters post-Moore. Parallelism and concurrency in software CS-302 Des capteurs aux téléphones intelligents,en passant par les pl
Mirjana StojilovicMirjana Stojilović received the Dipl. Ing. and Ph.D. degrees from the School of Electrical Engineering, University of Belgrade, in 2006 and 2013, respectively. From 2010 to 2013, she was collaborating with the Processor Architecture Laboratory at EPFL, visiting periodically as a Guest Researcher. From 2013 to 2016, she was working at the University of Applied Sciences Western Switzerland as a senior researcher, and at EPFL as a lecturer. She joined Parallel Systems Architecture Lab at EPFL in October 2016. Mirjana's main research interests include electronic design automation, reconfigurable computing, electromagnetic-compatibility and signal-integrity issues, and hardware security. Mirjana Stojilović serves on the program committee of the FPGA, FPL, and FCCM conferences and as a reviewer for IEEE TCAD, TVLSI, TC, TEMC, IEEE Access and ACM TRETS. She received the Best Paper Award at 2016 International Symposium on Electromagnetic Compatibility (EMC Europe 2016), Young Scientist Award at 33rd International Conference on Lightning Protection (ICLP2016), and the Young Author Best Paper Award at the 20th Telecommunication Forum in Belgrade (TELFOR 2012). In 2015, the EPFL School of Computer and Communication Sciences (IC) presented her with the Teaching Award.
Maher KayalMaher Kayal received M.S. and Ph.D degrees in electrical engineering from the Ecole Polytechnique Fédérale de Lausanne (EPFL, Switzerland) in 1983 and 1989 respectively. He has been with the Electronics laboratories of the Ecole Polytechnique Fédérale de Lausanne (EPFL, Switzerland) since 1990, where he is currently a professor and director of the Energy Management and Sustainability" section. He has published many scientific papers, coauthor of three text books dedicated to mixed-mode CMOS design and he holds eleven patents. His technical contributions have been in the area of analog and Mixed-signal circuits design including highly linear and tunable sensors microsystems, signal processing and green energy management. Prizes and Honors : Electronics Letters journal Premium Award 2013, Outstanding Paper Award? IEEE Mixdes 2013 Basil Papadias paper Award, IEEE Powertech 2013 Best Paper Awards, Mixdes 2013 Best Paper Awards, ICCAS 2012 Outstanding Paper Award- IEEE Mixdes 2012. Poland Section IEEE ED Chapter special award in 2011. Credit Suisse Award for Best Teaching- 2009. The William M. Portnoy Award at the Energy Conversion Congress and Exposition , California Sept 2009. Best Paper Award - IEEE-Mixdes 2009. High Quality Paper - IEEE Power Tech Conference June 2009. Best Paper Award - IEEE-Mixdes 2007. Best Paper Award - IEEE-TTTC International Conference on Automation, Quality and Testing, Robotics - 2006. Best Application Specific Integrated Circuit at the International European Design and Test Conference ED&TC - 1997. Ascom Award for the Best Work in Telecommunication Fields 1990. Publications Books. Books: Methodology for the Digital Calibration of Analog Circuits and Systems, Marc Pastre & Maher Kayal. Springer Publisher- (ISBN 1-4020-4252-3)-2006. Structured Analog CMOS Design, Danica Stefanovic & Maher Kayal. Springer Publisher-(ISBN 978-1-4020-8572-7)-2008. Linear CMOS RF Amplifiers for Wireless Applications, Maher Kayal, Springer Publisher. (ISBN 978-90-481-9360-8)-2010. Coeditor of Microelectronics Education Kluwer Academic Publishers. (ISBN 1-4020-2072-4). -2004.
Drazen DujicDrazen Dujic is an Associate Professor and Head of the Power Electronics Laboratory at EPFL. He received the Dipl.Ing. and MSc degrees from the University of Novi Sad, Serbia in 2002 and 2005, respectively, and the PhD degree from Liverpool John Moores University, UK in 2008. From 2003 to 2006, he was a Research Assistant with the Faculty of Technical Sciences at University of Novi Sad. From 2006 to 2009, he was a Research Associate with Liverpool John Moores University. After that he moved to industry and joined ABB Switzerland Ltd, where from 2009 to 2013, he was Scientist and then Principal Scientist with ABB Corporate Research Center in Baden-Dättwil, and from 2013 to 2014 he was R&D Platform Manager with ABB Medium Voltage Drives in Turgi. He joined EPFL in 2014 as Tenure Track Assistant Professor and was promoted to Associate Professor in 2021. His research interests include the areas of design and control of advanced high power electronic systems and high-performance drives, predominantly for the medium voltage applications related to electrical energy generation, conversion and storage. He has authored or coauthored more than 150 scientific publications and has filed 16 patents. In 2018 he received EPE Outstanding Service Award from European Power Electronics and Drives Association and in 2014 the Isao Takahashi Power Electronics Award for Outstanding Achievement in Power Electronics. He is Senior Member of IEEE, and serves as Associate Editor for IEEE Transactions on Power Electronics, IEEE Transactions on Industrial Electronics and IET Electric Power Applications. He is Chairman of the Swiss IEEE Power Electronics Society (PELS) Chapter and IEEE PELS R8 Chair.
Shashwat ShrivastavaI am a Ph.D. student at EPFL, advised by Dr. Mirjana Stojilović. I am broadly interested in FPGA architecture and Computer-Aided Design. My research is focused on reducing the compile time for FPGAs by incorporating architectural enhancements and rethinking CAD algorithms.
Thomas Emile BourgeatEnseignement et PhD Doctorant·es actuel·les Neelu Shivprakash Kalani, Jiawei Lin, Alexandre Pinazza, Jiacheng Ma, Martina Camaioni, Guokai Chen, Mohammadarman Soleimani Cours Computer security and privacy COM-301 C'est un cours d'introduction à la sécurité informatique et privée. L'objectif est de fournir aux étudiants les moyens de raisonner sur les problèmes de sécurité et de confidentialité et de leur donner les moyens de les affronter. Constructive Computer Architecture CS-62
