Sébastien Jean Robert DoeraeneExpertise
Language design, compilateurs, machines virtuelles.Pédagogie en informatique.
Travail en cours
Scala.js, the dialect of Scala for JavaScript and WebAssembly
Sébastien Doeraene is a compiler/runtime systems hacker and a Scala enthusiast. Best known as the author of Scala.js, he is now lecturer at EPFL. He holds a PhD from EPFL, having worked under the supervision of Prof. Martin Odersky, and a master's degree in computer science engineering from Université catholique de Louvain in Belgium. When he
James Richard LarusEnseignement et PhD A dirigé les thèses EPFL de Stuart Anthony Byma, David Teksen Aksun, Sahand Kashani A co-dirigé les thèses EPFL de Adrien Ghosn, Seyedmahyar Emami
Shashwat ShrivastavaI am a Ph.D. student at EPFL, advised by Dr. Mirjana Stojilović. I am broadly interested in FPGA architecture and Computer-Aided Design. My research is focused on reducing the compile time for FPGAs by incorporating architectural enhancements and rethinking CAD algorithms.
Pasquale Davide SchiavoneEnseignement et PhD Cours Design technologies for integrated systems CS-472 La synthèse hardware est le processus de transformation - itérativement raffiné, détaillé et optimisé - d'une représentation faite en langage de description matérielle en un circuit. Ce cours présente les algorithmes, outils et méthodes de la compilation matérielle et de la synthèse logique.
Giovanni De MicheliExpertise
Technologies de conception pour les systèmes intégrés, tels que la synthèse, le codesign de HW/SW et la conception de basse puissance. Technologies de conception des systèmes sur les plateformes hétérogènes comprenant les composants électriques, et biologiques.
En savoir plus
Consulter svp http://si2.epfl.ch/~demichel/
Enseignement et PhD A dirigé les thèses EPFL de Abhishek Garg, Mohamed Haykel Ben Jamaa, Francesco Zanini, Ciprian Seiculescu, Cristina Boero, Hu Xu, Andrea Cavallini, Shashi Kanth Marco MattavelliEnseignement et PhD A dirigé les thèses EPFL de Christophe Clerc, Ruohua Zhou, Beilu Shao, Christophe Lucarz, Richard Thavot, Ab Al Hadi Bin Ab Rahman, Endri Bezati, Simone Casale Brunet, Malgorzata Michalska, Ana Angelica Hernandez Lopez, Aurélien Bloch, Mustafa Besirli, Ünsal Öztürk A co-dirigé les thèses EPFL de Sylvain Aguirre Cours Systems and architectures for signal processing EE-555 Etude des composants essentiels eessentiels et des technologies des systèmes de traitements des signau
Paolo IennePaolo Ienne has been a Professor at the EPFL since 2000 and heads the Processor Architecture Laboratory (LAP). Prior to that, he worked for the Semiconductors Group of Siemens AG, Munich, Germany (which later became Infineon Technologies AG) where he was at the head of the Embedded Memories unit in the Design Libraries division. His research interests include various aspects of computer and processor architecture, FPGAs and reconfigurable computing, electronic design automation, and computer arithmetic. Ienne was a recipient of Best Paper Awards at the 20th, 24th, and 28th ACM/SIGDA International Symposia on Field-Programmable Gate Arrays (FPGA), in 2012, 2016 and 2020, at the 19th and 30th International Conference on Field-Programmable Logic and Applications (FPL), in 2009 and 2020, at the International Conference on Compilers, Architectures, and Synthesis for Embedded Systems (CASES), in 2007, and at the 40th Design Automation Conference (DAC), in 2003; many other papers have been candidates to Best Paper Awards in prestigious venues. He has served as general, programme, and topic chair of renown international conferences, including organizing in Lausanne the 26th International Conference on Field-Programmable Logic and Applications (FPL) in 2016. He serves on the steering committee of the IEEE Symposium on Computer Arithmetic (ARITH) and of the International Conference on Field-Programmable Logic and Applications (FPL). Ienne has guest edited a number of special issues and special sections on various topics for IEEE and ACM journals. He is regularly member of program committees of international workshops and conferences in the areas of design automation, computer architecture, embedded systems, compilers, FPGAs, and asynchronous design. He has been an associate editor of ACM Transactions on Architecture and Code Optimization (TACO), since 2015, of ACM Computing Surveys (CSUR), since 2014, and of ACM Transactions on Design Automation of Electronic Systems (TODAES) from 2011 to 2016.
Martin OderskyEnseignement et PhD Doctorant·es actuel·les Matthieu Bovel, Yaoyu Zhao, Anna Herlihy, Nguyên Cao Pham, Yichen Xu A dirigé les thèses EPFL de Julie Vachon, Matthias Zenger, Michel Schinz, Philippe Altherr, Vincent Cremet, Burak Emir, Stéphane Micheloud, Iulian Dragos, Philipp Haller, Gilles Dubochet, Tiark Rompf, Ingo Maier, Lukas Rytz, Aleksandar Prokopec, Heather Miller, Vlad Ureche, Nada Amin, Manohar Jonnalagedda, Hubert Plociniczak, Vojin Jovanovic, Sandro Stucki, Eugene Burmako, Dmytro Petrashko, Séb
Hervé BourlardEnseignement et PhD A dirigé les thèses EPFL de Astrid Hagen, Katrin Weber, Todd Stephenson, Jitendra Ajmera, Shajith Ikbal, Mathew Magimai Doss, Mohamed Faouzi Benzeghiba, Mark Barnard, Yann Rodriguez, Hemant Misra, Christos Dimitrakakis, Guillaume Lathoud, Alexei Pozdnoukhov, Agnès Just, Mikaela Keller, Norman Hoon Thian Poh, Dong Zhang, Florent Monay Michaud, Pedro Manuel Da Silva Quelhas, Kevin Smith, Silèye Oumar Ba, Bertrand Mesot, Hamed Ketabdar, David Grangier, Guillermo Aradilla, Jean-François Paie
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