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Concept

Processeur basé sur la pile

Publications associées (25)

WarpAttack: Bypassing CFI through Compiler-Introduced Double-Fetches

Mathias Josef Payer, Flavio Toffalini, Luca Di Bartolomeo

Code-reuse attacks are dangerous threats that attracted the attention of the security community for years. These attacks aim at corrupting important control-flow transfers for taking control of a process without injecting code. Nowadays, the combinations o ...

IEEE COMPUTER SOC2023

Local electrochemical and thermal investigation of a segmented reversible solid oxide fuel cell and electrolyzer

Jan Van Herle, Zacharie Wuillemin, Stefan Diethelm, Hamza Moussaoui, Audrey Désirée Wesoly

A novel setup has been designed and mounted to investigate the local electrochemical and thermal behavior of a cell from a 4-cell short stack under reversible operation solid oxide fuel cell/solid oxide electrolyzer (SOFC/SOE). It consists in the partition ...

Pergamon-Elsevier Science Ltd2023

Aperture-Controlled Fabrication of All-Dielectric Structural Color Pixels

Olivier Martin, Philippe Renaud, Arnaud Bertsch, Daniel Migliozzi, Evgenii Glushkov, Hsiang-Chu Wang, Clémentine Sophie Sarah Lipp, Audrey Zoé Marie Jacquillat

While interference colors have been known for a longtime, conventionalcolor filters have large spatial dimensions and cannot be used tocreate compact pixelized color pictures. Here we report a simple yetelegant interference-based method of creating microsc ...

AMER CHEMICAL SOC2023

Hardware-Software Co-Design of an RPC Processor

Arash Pourhabibi Zarandi

The booming popularity of online services has led to a major evolution in the way these services are built and deployed. To cope with such online data-intensive services, service providers deploy several massive-scale datacenters, also referred to as wareh ...

EPFL2021

A Simpler and Faster NIC Driver Model for Network Functions

George Candea, Solal Vincenzo Pirelli

The advent of software network functions calls for stronger correctness guarantees and higher performance at every level of the stack. Current network stacks trade simplicity for performance and flexibility, especially in their driver model. We show that p ...

2021

Understanding and Mitigating Latency Variability of Latency-Critical Applications

Mia Primorac

A major theme of IT in the past decade has been the shift from on-premise hardware to cloud computing. Running a service in the public cloud is practical, because a large number of resources can be bought on-demand, but this shift comes with its own set of ...

EPFL2020

Novel features of centriole polarity and cartwheel stacking revealed by cryo-tomography

Pierre Gönczy, Paul Guichard, Davide Demurtas, Sergey Nazarov, Georgios Hatzopoulos, Alexandra Bezler, Veronika Nemcíková Villímová

Centrioles are polarized microtubule-based organelles that seed the formation of cilia, and which assemble from a cartwheel containing stacked ring oligomers ofSAS-6 proteins. A cryo-tomography map of centrioles from the termite flagellateTrichonymphaspp. ...

2020

Verifying Software Network Functions with No Verification Expertise

George Candea, Aikaterini Argyraki, Solal Vincenzo Pirelli, Luis David Figueiredo Mascarenhas Moreira Pedrosa, Rishabh Ramesh Iyer

We present the design and implementation of Vigor, a software stack and toolchain for building and running software network middleboxes that are guaranteed to be correct, while preserving competitive performance and developer productivity. Developers write ...

ACM2019

An FPGA-Based Test System for RRAM Technology Characterization

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Maxime Victor Thammasack

Resistive random access memory (RRAM) technologies have recently gained large attention from the academic and industrial research communities. Significant efforts have been made to enhance the performance of the memory stacks from both communities through ...

2018

Low-Overhead Dynamic Instruction Mix Generation using Hybrid Basic Block Profiling

Willy Zwaenepoel, Andrzej Pawel Nowak

Dynamic instruction mixes form an important part of the toolkits of performance tuners, compiler writers, and CPU architects. Instruction mixes are traditionally generated using software instrumentation, an accurate yet slow method, that is normally limite ...

2018

The Effects of Component Tolerances on the Thermo-Mechanical Reliability of SOFC Stacks

Jan Van Herle, Arata Nakajo, Zacharie Wuillemin, Fabio Greco

The reliability of solid oxide fuel cell (SOFC) systems is closing the gap to meet the requirements for market implementation. Finite-element (FE) stack models, typically used for stack reliability analyses, commonly consider idealized components. In reali ...

2017

Method for labeling products with a transparent photoluminescent label, and transparent photoluminescent label

Nicolas Grandjean, Nasser Hefiana

A method for marking a product (1) with a photoluminescent mark, said mark comprising a photoluminescent portion (10) which is transparent under normal light conditions and revealed by photoluminescence under UV illumination, said mark further comprising a ...

2017

Effect of O2 migration in Pt/HfO2/Ti/Pt structure

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Maxime Victor Thammasack

In this paper, we study the post-fabrication phenomenon of natural oxidation of the Ti layer observed in a Pt/HfO2/Ti/Pt Resistive Random Access Memory (OxRRAM) stack with no external influence. We identify that the resistance ratio decreases by ...

Springer Verlag2017

Algorithmic Resource Verification

Ravichandhran Kandhadai Madhavan

Static estimation of resource utilisation of programs is a challenging and important problem with numerous applications. In this thesis, I present new algorithms that enable users to specify and verify their desired bounds on resource usage of functional p ...

EPFL2017

Solid oxide fuel cell anode degradation by the effect of hydrogen chloride in stack and single cell environments

Christian Ludwig, Jan Van Herle, Stefan Diethelm, Hossein Madi

The poisoning effect by hydrogen chloride (HCl) on state-of-the-art Ni anode-supported solid oxide fuel cells (SOFCs) at 750 degrees C is evaluated in either hydrogen or syngas fuel. Experiments are performed on single cells and short stacks and HCl concen ...

2016

Cost-Effective Design of Mesh-of-Tree Interconnect for Multi-Core Clusters with 3-D Stacked L2 Scratchpad Memory

Giovanni De Micheli, Luca Benini

3-D integrated circuits (3-D ICs) offer a promising solution to overcome the scaling limitations of 2-D ICs. However, using too many through-silicon-vias (TSVs) pose a negative impact on 3-D ICs due to the large overhead of TSV (e.g., large footprint and l ...

Institute of Electrical and Electronics Engineers2015

Thermo-mechanical Reliability of SOFC Stacks During Combined Long-term Operation and Thermal Cycling

Jan Van Herle, Zacharie Wuillemin, Arata Nakajo, Fabio Greco

Thermo-mechanical issues in solid oxide fuel cells (SOFC) must be understood and overcome to meet the reliability standards for market implementation. This study presents a thermo-mechanical model of an SOFC-stack SRU. The analysis starts with the simulati ...

2015

Temperature-Aware Runtime Power Management for Chip-Multiprocessors with 3-D Stacked Cache

Giovanni De Micheli, Siang-Yun Lee

The advent of 3-D fabrication technology makes it possible to stack a large amount of last-level cache memory onto a multi-core die to reduce off-chip memory accesses and, thus, increases system performance. However, the higher power density (i.e., power d ...

2014

Late Data Layout: Unifying Data Representation Transformations

Martin Odersky, Eugene Burmako, Vlad Ureche

Values need to be represented differently when interacting with certain language features. For example, an integer has to take an object-based representation when interacting with erased generics, although, for performance reasons, the stack-based value re ...

ACM2014

Leveraging Hardware Message Passing for Efficient Thread Synchronization

André Schiper, Thomas Ropars, Darko Petrovic

As the level of parallelism in manycore processors keeps increasing, providing efficient mechanisms for thread synchronization in concurrent programs is becoming a major concern. On cache-coherent shared-memory processors, synchronization efficiency is ult ...

Assoc Computing Machinery2014