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Concept

NOR gate

Publications associées (28)

Effects of Degrees of Freedom on Calculating Diffusion Properties in Nanoporous Materials br

Berend Smit, Henglu Xu, Raffaela Cabriolu

If one carries out a molecular simulation ofNparticlesusing periodic boundary conditions, linear momentum is conserved,and hence, the number of degrees of freedom is set to 3N-3. Inmost programs, this number of degrees of freedom is the defaultsetting. How ...

AMER CHEMICAL SOC2022

Three-Input Gates for Logic Synthesis

Giovanni De Micheli, Mathias Soeken, Heinz Riener, Eleonora Testa, Dewmini Sudara Marakkalage

Most logic synthesis algorithms work on graph representations of logic functions with nodes associated with arbitrary logic expressions or simple logic functions and iteratively optimize such graphs. While recent multilevel logic synthesis efforts focused ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2021

A Deeper Look at the Energy Consumption of Lightweight Block Ciphers

Francesco Regazzoni, Subhadeep Banik, Andrea Felice Caforio, Muhammed Fatih Balli

In the last few years, the field of lightweight cryptography has seen an influx in the number of block ciphers and hash functions being proposed. In the past there have been numerous papers that have looked at circuit level implementation of block ciphers ...

IEEE2021

Further Results on Efficient Implementations of Block Cipher Linear Layers

Subhadeep Banik

At the FSE conference of ToSC 2018, Kranz et al. presented their results on shortest linear programs for the linear layers of several well known block ciphers in literature. Shortest linear programs are essentially the minimum number of 2-input xor gates r ...

2021

Reconfigurable Logic Gates Based on Programable Multistable Mechanisms

Simon Nessim Henein, Ilan Vardi, Hubert Pierre-Marie Benoît Schneegans, Mohamed Gamal Abdelrahman Ahmed Zanaty

Binary logic gates are building blocks of computing machines, in particular, electronic computers. One variant is the programable logic gate, also known as the reconfigurable logic gate, in which the logical function implemented can be modified. In this pa ...

2020

Sweat monitoring with CMOS compatible technology: ISFETS and beyond

Francesco Bellando

In recent years, sweat has gained increasing attention from the scientific community as a new analyte for health monitoring. The main advantage with respect to the "Gold Standard" for laboratory analysis, i.e. blood, is of course the possibility of perform ...

EPFL2020

Triboelectric‐TFT Flip‐Flop for Bistable Latching of Dielectric Elastomer Actuators

Danick Briand, Herbert Shea, Rubaiyet Iftekharul Haque, Ronan Julien Hinchet, Alexis Pierre Henri Marette, Xiaobin Ji

A high‐voltage flip‐flop combining two self‐powered soft sensors with a flexible high‐voltage thin film transistor (HVTFT) is reported, and is used to electrically latch dielectric elastomer actuators (DEAs) in zero and high‐strain states. Two touch‐actuat ...

2019

Reducing the Multiplicative Complexity in Logic Networks for Cryptography and Security Applications

Giovanni De Micheli, Mathias Soeken, Eleonora Testa, Luca Gaetano Amarù

Reducing the number of AND gates plays a central role in many cryptography and security applications. We propose a logic synthesis algorithm and tool to minimize the number of AND gates in a logic network composed of AND, XOR, and inverter gates. Our appro ...

ASSOC COMPUTING MACHINERY2019

More Results on Shortest Linear Programs

Subhadeep Banik

2019

Performance improvement of chip-level CMOS-integrated ReRAM cells through material optimization

Yusuf Leblebici, Thomas La Grange, Tugba Demirci, Elmira Shahrabi

The integration of the resistive random access memory (ReRAM) with CMOS logic circuitry provides a solution to scaling limitations, and offers promising candidates for use in next generation computing applications. It is challenging to realize a reliable, ...

ELSEVIER SCIENCE BV2019

Sensing device for sensing minor charge variations

Mihai Adrian Ionescu, Cem Alper, Teodor Rosca

A charge sensing device for sensing charge variations in a charge storage area includes: a TFET having at least one sense gate; and a capacitive coupling for coupling the charge storage area with the sense gate. ...

2019

Field-effect transistor device or sensor for sensing ions, molecules or biomarkers in a fluid

Mihai Adrian Ionescu, Francesco Bellando, Erick Antonio Garcia Cordero, Junrui Zhang

The present disclosure concerns a Field-Effect Transistor device or sensor comprising at least one drain region, at least one source region, at least a channel region, at least a first gate connected to the channel region, at least one stack comprising at ...

2019

Inverse Gating for Low Energy Block Ciphers

Subhadeep Banik, Francesco Regazzoni

In this paper we explore the technique of “inverse gating” which is a significant improvement over the ”round gating” technique introduced in HOST 2016. Round gating worked by generating timing signals to separate glitch propagation from one circuit elemen ...

2018

Improvements to Boolean resynthesis

Giovanni De Micheli, Mathias Soeken, Luca Gaetano Amarù

In electronic design automation Boolean resynthesis techniques are increasingly used to improve the quality of results where algebraic methods hit local minima Boolean methods rely on complete functional properties of a logic circuit, preferably including ...

IEEE2018

Progress in single-photon avalanche diode image sensors in standard CMOS: From two-dimensional monolithic to three-dimensional-stacked technology

Edoardo Charbon, Myung Jae Lee

Single-photon detection and photon counting are useful tools in many fields, from light detection and ranging (LiDAR) to biomedical imaging and from time-resolved Raman spectroscopy to quantum applications. In this context, recently, single-photon avalanch ...

IOP PUBLISHING LTD2018

The Cryogenic Temperature Behavior of Bipolar, MOS, and DTMOS Transistors in Standard CMOS

Edoardo Charbon

Both CMOS bandgap voltage references and temperature sensors rely on the temperature behavior of either CMOS substrate BJTs or MOS transistors in weak inversion. Bipolar transistors are generally preferred over MOS transistors because of their lower spread ...

2018

Inverter Propagation and Fan-Out Constraints for Beyond-CMOS Majority-Based Technologies

Giovanni De Micheli, Mathias Soeken, Eleonora Testa

Traditional logic synthesis faces challenges of meeting the requirements demanded by the many emerging nanotech-nologies that are based on logic models different from standard CMOS. Several emerging nanodevices including Quantum-dot Cellular Automata (QCA) ...

IEEE2017

Characterization of bipolar transistors for cryogenic temperature sensors in standard CMOS

Edoardo Charbon

This paper presents the cryogenic characterization of the bipolar substrate PNPs that are typically employed as sensing elements in CMOS integrated temperature sensors. PNPs realized in a standard 160-nm CMOS technology were characterized over the temperat ...

2017

A Fault Tolerant Ripple-Carry Adder with Controllable-Polarity Transistors

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Jian Zhang, Hassan Ghasemzadeh Mohammadi

This paper deals with the effects of faults on circuits implemented with controllable-polarity transistors. We propose a new fault model that suits the characteristics of these devices, and report the results of a SPICE-based analysis of the effects of fau ...

2016

Disorder engineering and conductivity dome in ReS2 with electrolyte gating

Oleg Yazyev, Andras Kis, Dumitru Dumcenco, Dmitry Ovchinnikov, Fernando Gargiulo, Diego José Pasquier

Atomically thin rhenium disulphide (ReS2) is a member of the transition metal dichalcogenide family of materials. This two-dimensional semiconductor is characterized by weak interlayer coupling and a distorted 1T structure, which leads to anisotropy in ele ...

Nature Publishing Group2016