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Concept

Pendule (horloge)

Publications associées (26)

Analyse, synthèse et création d'échappements horlogers par la théorie des engrenages

Olivier Laesser

In principle, knowledge of watch and clock escapements is acquired through the study of the geometry and operation of numerous realizations, studied patiently one after the other. Knowing the classics, one can hope to construct a new realizations by borrow ...

EPFL2014

Method for estimating and correcting a drift between clocks of receiving transceiver and a corresponding emitting transceiver, and receive for implementing said method

Jean-Yves Le Boudec, Ruben Merz

Method for estimating and correcting a frequency offset between a local clock of a receiving transceiver and a remote clock of an emitting transceiver comprises receiving by said receiving transceiver, a signal emitted by the emitting transceiver, said sig ...

2013

Dynamics and Control of 2D SpiderCrane: A Lie-Bäcklund Approach

Dominique Bonvin, Philippe Müllhaupt

In this paper we present modeling and control of a multicable suspended mechanism called the ‘2D SpiderCrane’. The use of cables, and thus avoiding conventional heavy components, makes such a mechanism suitable for working at high transfer speeds. The init ...

2009

Stabilization of a 2D-SpiderCrane Mechanism Using Damping Assignment Passivity-based Control

Dominique Bonvin, Philippe Müllhaupt

Cable-operated manipulators, also termed cable robots, possess a number of unique properties which make them suitable for tasks involving high payloads, large workspaces, and interacting with dangerous materials. But the fact that cables can only pull the ...

2008

Conception et optimisation multicritère des échappements libres pour montres-bracelets mécaniques

Thierry Conus

The watchmaking crisis of the nineteen-seventies in effect marked an interruption of scientific research into the working of mechanical watches. For the past few years, a revival of interest in these timepieces has given industrialists the financial resour ...

EPFL2007

A multichannel 3.5mW/Gbps/channel gated oscillator based CDR in a 0.18µm digital CMOS technology

Yusuf Leblebici, Seyed Armin Tajalli, Paul Victor Georges Muller

This article presents a very low-power clock and data recovery (CDR) circuit with 8 parallel channels achieving an aggregate data rate of 20 Gbps. A structural top-down design methodology has been applied to minimize the power dissipation while satisfying ...

2005