Mediaspace scheduled maintenance: Aug 25, 2026 07:00 - 12:00 AM. During this time, videos will be temporarily unavailable. Check status updates.

Concept

Futures (informatique)

Publications associées (23)

DatAFLow: Toward a Data-flow-guided Fuzzer

Mathias Josef Payer

This Replicating Computational Report (RCR) describes (a) our datAFLow fuzzer and (b) how to replicate the results in "datAFLow: Toward a Data-Flow-Guided Fuzzer." Our primary artifact is the datAFLow fuzzer. Unlike traditional coverage-guided greybox fuzz ...

2023

Imprecise Store Exceptions

Babak Falsafi, Mathias Josef Payer, Siddharth Gupta, Yunho Oh, Yuanlong Li, Abhishek Bhattacharjee, Qingxuan Kang

Precise exceptions are a cornerstone of modern computing as they provide the abstraction of sequential instruction execution to programmers while accommodating microarchitectural optimizations. However, increasing compute capabilities in deep memory hierar ...

ACM2023

A Comprehensive Timing Model for Accurate Frequency Tuning in Dataflow Circuits

Paolo Ienne, Andrea Guerrieri, Lana Josipovic

The ability of dataflow circuits to implement dynamic scheduling promises to overcome the conservatism of static scheduling techniques that high-level synthesis tools typically rely on. Yet, the same distributed control mechanism that allows dataflow circu ...

IEEE COMPUTER SOC2022

Inter-actions parallel execution on GPU from high-level dataflow synthesis

Marco Mattavelli, Simone Casale Brunet, Aurélien François Gilbert Bloch

Recent GPU architectures make available numbers of parallel processing units that exceed by orders of magnitude the ones offered by CPU architectures. Whereas programs written using dataflow programming languages are well suited for programming heterogeneo ...

IEEE2022

Fully-Asynchronous Fully-Implicit Variable-Order Variable-Timestep Simulation of Neural Networks

Felix Schürmann, Bruno Ricardo Da Cunha Magalhães

State-of-the-art simulations of detailed neurons follow the Bulk Synchronous Parallel execution model. Execution is divided in equidistant communication intervals, with parallel neurons interpolation and collective communication guiding synchronization. Su ...

2020

Verification of Software Network Functions with No Verification Expertise

Arseniy Zaostrovnykh

Software network functions (NFs), such as a network address translator, load balancer, or proxy, promise to bring flexibility and rapid innovation to computer networks and to reduce operational costs. However, continuous updates and flexibility typically c ...

EPFL2020

Asynchronous Simulation of Neuronal Activity

Bruno Ricardo Da Cunha Magalhães

Simulations of the electrical activity of networks of morphologically-detailed neuron models allow for a better understanding of the brain. Short time to solution is critical in order to study long biological processes such as synaptic plasticity and learn ...

EPFL2019

Theory and Practice of Coroutines with Snapshots

Fengyun Liu, Aleksandar Prokopec

While event-driven programming is a widespread model for asynchronous computing, its inherent control flow fragmentation makes event-driven programs notoriously difficult to understand and maintain. Coroutines are a general control flow construct that can ...

2018

A Programming Model and Foundation for Lineage-Based Distributed Computation

Philipp Haller, Heather Christine Klug

The most successful systems for "big data'' processing have all adopted functional APIs. We present a new programming model we call function passing designed to provide a more principled substrate, or middleware, upon which to build data-centric distribute ...

Cambridge University Press2018

Passing Messages while Sharing Memory

Rachid Guerraoui

We introduce a new distributed computing model called m&m that allows processes to both pass messages and share memory. Motivated by recent hardware trends, we find that this model improves the power of the pure message-passing and shared-memory models. As ...

ASSOC COMPUTING MACHINERY2018

Execution Trace Graph of Dataflow Process Networks

Marco Mattavelli, Simone Casale Brunet

The paper introduces and specifies a formalism that provides complete representations of dataflow process network (DPN) program executions, by means of directed acyclic graphs. Such graphs, also known as execution trace graphs (ETG), are composed of nodes ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2018

ProteusTM: Abstraction Meets Performance in Transactional Memory

Rachid Guerraoui, Anne-Marie Kermarrec, Diego Didona

The Transactional Memory (TM) paradigm promises to greatly simplify the development of concurrent applications. This led, over the years, to the creation of a plethora of TM implementations delivering wide ranges of performance across workloads. Yet, no un ...

Assoc Computing Machinery2016

ProteusTM: Abstraction Meets Performance in Transactional Memory

Rachid Guerraoui, Anne-Marie Kermarrec, Paolo Romano, Diego Didona

2016

Function Passing: A Model for Typed, Distributed Functional Programming

Philipp Haller, Heather Christine Klug, Jocelyn Boullier

The most successful systems for “big data” processing have all adopted functional APIs. We present a new programming model we call function passing designed to provide a more principled substrate on which to build data-centric distributed systems. A key id ...

Assoc Computing Machinery2016

A Scala Library for Testing Student Assignments on Concurrent Programming

Mikaël Mayer, Ravichandhran Kandhadai Madhavan

We present a lightweight library for testing concurrent Scala programs by systematically exploring multiple interleavings between user-specified operations on shared objects. Our library is targeted at beginners of concurrent programming in Scala, runs on ...

Assoc Computing Machinery2016

Programming Models and Methods for Heterogeneous Parallel Embedded Systems

Marco Mattavelli, Simone Casale Brunet, Endri Bezati

The growing complexity of digital signal processing applications makes a compelling case for the adoption of higher-level programming models such as dataflow for the implementation of applications on programmable logic devices and many/multi-core embedded ...

2016

RAY: Integrating Rx and Async for Direct-Style Reactive Streams

Philipp Haller, Heather Christine Klug

Languages like F#, C#, and recently also Scala, provide “async” extensions which aim to make asynchronous programming easier by avoiding an inversion of control that is inherent in traditional callback-based programming models (for the purpose of this pape ...

2013

TURNUS: A design exploration framework for dataflow system design

Marco Mattavelli, Simone Casale Brunet

While research on the design of heterogeneous concurrent systems has a long and rich history, a unified design methodology and tool support has not emerged so far, and thus the creation of such systems remains a difficult, time-consuming and error-prone pr ...

IEEE2013

Scala to the Power of Z3: Integrating SMT and Programming

Viktor Kuncak, Philippe Paul Henri Suter

We describe a system that integrates the SMT solver Z3 with the Scala programming language. The system supports the use of the SMT solver for checking satisfiability, unsatisfiability, as well as solution enumeration. The embedding of formula trees into Sc ...

Springer-Verlag Berlin2011

A Data-oriented Transaction Execution Engine and Supporting Tools

Anastasia Ailamaki, Frederick Ryan Johnson, Ippokratis Pandis, Danica Porobic, Pinar Tözün, Miguel Sérgio De Oliveira Branco

Conventional OLTP systems assign each transaction to a worker thread and that thread accesses data, depending on what the transaction dictates. This thread-to-transaction work assignment policy leads to unpredictable accesses. The unpredictability forces e ...

2011