Mediaspace scheduled maintenance: Aug 25, 2026 07:00 - 12:00 AM. During this time, videos will be temporarily unavailable. Check status updates.

Concept

High-level synthesis

Publications associées (32)

Inter-actions parallel execution on GPU from high-level dataflow synthesis

Marco Mattavelli, Simone Casale Brunet, Aurélien François Gilbert Bloch

Recent GPU architectures make available numbers of parallel processing units that exceed by orders of magnitude the ones offered by CPU architectures. Whereas programs written using dataflow programming languages are well suited for programming heterogeneo ...

IEEE2022

SIMD Parallel Execution on GPU from High-Level Dataflow Synthesis

Marco Mattavelli, Simone Casale Brunet, Aurélien François Gilbert Bloch

Writing and optimizing application software for heterogeneous platforms including GPU units is a very difficult task that requires designer efforts and resources to consider several key elements to obtain good performance. Dataflow programming has shown to ...

2022

Resource Sharing in Dataflow Circuits

Paolo Ienne, Andrea Guerrieri, Lana Josipovic, Axel Marmet

To achieve resource-efficient hardware designs, HLS tools share (i.e., time-multiplex) functional units among operations of the same type. This optimization is typically performed together with operation scheduling to ensure the best possible unit usage at ...

IEEE2022

Uncooperative Rendezvous in Space: Design of an Electronic Architecture for High Performance Avionic with Multi Sensor Input and Intensive Data Rate

Michaël Yannick Juillard

Active Debris Removal missions consist of sending a satellite in space and removing one or more debris from their current orbit. A key challenge is to obtain information about the uncooperative target. By gathering the velocity, position, and rotation of t ...

EPFL2022

Modular Synthesis of Benzocyclobutenes via Pd(II)-Catalyzed Oxidative [2+2] Annulation of Arylboronic Acids with Alkenes

Jieping Zhu, Anne-Clémence Corminboeuf, Qian Wang, Simone Gallarati, Takuji Fujii

Benzocyclobutenes (BCBs) are highly valuable compounds in organic synthesis, medicinal chemistry, and materials science. However, catalytic modular synthesis of functionalized BCBs from easily accessible starting materials remains limited. We report herein ...

2022

Frugal Decentralized Learning

Anne-Marie Kermarrec

Machine learning is currently shifting from a centralized paradigm to decentralized ones where machine learning models are trained collaboratively. In fully decentralized learning algorithms, data remains where it was produced, models are trained locally a ...

IEEE2022

High-Level Synthesis of Dynamically Scheduled Circuits

Lana Josipovic

High-Level Synthesis (HLS) tools generate hardware designs from high-level programming languages. These tools almost universally build datapaths that are controlled using a centralized controller which relies on a static, compile-time schedule to determine ...

EPFL2021

Low-Latency High-Bandwidth Circuit and System Design for Trigger Systems in High Energy Physics

Marcos Vinícius Silva Oliveira

The increasing luminosity in HEP (High Energy Physics) colliders demands trigger systems to be more selective. First, more information from the detector is routed to the trigger system. Second, larger parts of this information are processed together. These ...

EPFL2021

LUT-Based Optimization For ASIC Design Flow

Giovanni De Micheli, Eleonora Testa, Luca Gaetano Amarù

In this paper, we develop a new LUT-based optimization flow tailored for the synthesis of ASICs rather than FPGAs. We enhance LUT-mapping to consider the literal/AIG cost of LUT-nodes. We extend traditional Boolean methods to simplify and re-shape LUT-netw ...

2021

Direct Model-checking of SysML Models

Alessandro Tempia Calvino

Model-checking intends to verify whether a property is satisfied by a model, or not. Model-checking of high-level models, e.g. SysML models, usually first requires a model transformation to a low level formal specification. The present papers proposes a ne ...

SCITEPRESS2021

Preserving Self-Duality During Logic Synthesis for Emerging Reconfigurable Nanotechnologies

Giovanni De Micheli, Heinz Riener, Akash Kumar

Emerging reconfigurable nanotechnologies allow the implementation of self-dual functions with a fewer number of transistors as compared to traditional CMOS technologies. To achieve better area results for Reconfigurable Field-Effect Transistors (RFET)-base ...

IEEE2021

A High-Level Synthesis Flow for the Implementation of Iterative Stencil Loop Algorithms on FPGA Devices

David Atienza Alonso, Ivan Beretta, Alessandro Antonio Nacci

The automatic generation of hardware implementations for a given algorithm is generally a difficult task, especially when data dependencies span across multiple iterations such as in iterative stencil loops (ISLs). In this paper, we introduce an automatic ...

IEEE/ACM Press2013