Telecommunications Circuits Laboratory

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5G New Radio (NR) has stringent demands on both performance and complexity for the design of low-density parity-check (LDPC) decoding algorithms and corresponding VLSI implementations. Furthermore, decoders must fully support the wide range of all 5G NR bl ...

Driven by the demand for real-time processing and the need to minimize latency in AI algorithms, edge computing has experienced remarkable progress. Decision-making AI applications stand out for their heavy reliance on data-centric operations, predominantl ...

Implanted medical devices (IMDs) have been widely developed to support the monitoring and recording of biological data inside the body or brain. Wirelessly powered IMDs, a subset of implantable electronics, have been proposed to eliminate the limitations r ...

Embedded memories occupy an increasingly dominant part of the area and power budgets of modern systems-on-chips (SoCs). Multi-ported embedded memories, commonly used by media SoCs and graphical processing units, occupy even more area and consume higher pow ...

Verification and testing of hardware heavily relies on cycle-accurate simulation of RTL. As single-processor performance is growing only slowly, conventional, single-threaded RTL simulation is becoming impractical for increasingly complex chip designs and ...

Electronic devices play an irreplaceable role in our lives. With the tightening time to market, exploding demand for computing power, and continuous desire for smaller, faster, less energy-consuming, and lower-cost chips, computer-aided design for electron ...

Information theory has allowed us to determine the fundamental limit of various communication and algorithmic problems, e.g., the channel coding problem, the compression problem, and the hypothesis testing problem. In this work, we revisit the assumptions ...

The increasing complexity of transformer models in artificial intelligence expands their computational costs, memory usage, and energy consumption. Hardware acceleration tackles the ensuing challenges by designing processors and accelerators tailored for t ...

Due to its high parallelism, belief propagation (BP)decoding is amenable to high-throughput applications and thusrepresents a promising solution for the ultra-high peak datarate required by future communication systems. To bridge theperformance gap compare ...

Modern integrated circuits are tiny yet incredibly complex technological artifacts, composed of millions and billions of individual structures working in unison. Managing their complexity and facilitating their design drove part of the co-evolution of mode ...

A modular multiple frequency coils inductive link system to wirelessly provide power for at least a medical implant at an output of a receiving coil, whereby the receiving coil is configured to be implanted in an organism. The modular multiple frequency co ...

Situational awareness strategies are essential for the reliable and secure operation of the electric power grid which represents critical infrastructure in modern society. With the rise of converter-interfaced renewable generation and the consequent shift ...

In the past decades, a significant increase of the transistor density on a chip has led to exponential growth in computational power driven by Moore's law. To overcome the bottleneck of traditional von-Neumann architecture in computational efficiency, effo ...

Smarty is a fully-reconfigurable on-chip feed-forward artificial neural network (ANN) with ten integrated time-to-digital converters (TDCs) designed in a 16 nm FinFET CMOS technology node. The integration of TDCs together with an ANN aims to reduce system ...

Computer systems rely heavily on abstraction to manage the exponential growth of complexity across hardware and software. Due to practical considerations of compatibility between components of these complex systems across generations, developers have favou ...

Magnonics is a research field that has gained an increasing interest in both the fundamental and applied sciences in recent years. This field aims to explore and functionalize collective spin excitations in magnetically ordered materials for modern informa ...

We perform an error analysis of a fully discretised Streamline Upwind Petrov Galerkin Dynamical Low Rank (SUPG-DLR) method for random time-dependent advection-dominated problems. The time integration scheme has a splitting-like nature, allowing for potenti ...

Machine learning and data processing algorithms have been thriving in finding ways of processing and classifying information by exploiting the hidden trends of large datasets. Although these emerging computational methods have become successful in today's ...

Low-Density Parity-Check (LDPC) decoder is among the power hungry building blocks of wireless communication systems. Voltage scaling down to Near-Threshold (NT) voltages substantially improves energy efficiency, in theory up 10x. However, tuning the voltag ...

Modern hardware is increasingly complex, requiring increasing effort to understand in order to carefully engineer systems for optimal performance and effective utilization. Moreover, established design principles and assumptions are not portable to modern ...

Telecommunications Circuits Laboratory

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A Generalized Adjusted Min-Sum Decoder for 5G LDPC Codes: Algorithm and Implementation

EdgeAI-Aware Design of In-Memory Computing Architectures

Integrated Wireless Power, Data Communication, and Thermal Sensing System for Autonomous Multisite Brain Implants

Multi-Ported GC-eDRAM Bitcell with Dynamic Port Configuration and Refresh Mechanism

Highly Parallel RTL Simulation

Contemporary Logic Synthesis: with an Application to AQFP Circuit Optimization

On Speed and Advantage : Results in Information Velocity and Monitoring Problems

Accelerator-driven Data Arrangement to Minimize Transformers Run-time on Multi-core Architectures

High-Throughput and Flexible Belief Propagation List Decoder for Polar Codes

Graph generative deep learning models with an application to circuit topologies

A modular multiple frequency inductive link to wirelessly power multiple miniaturized implants

Functional-Basis Analysis of Non-Stationary Signals in Modern Power Grids: Theory and Implementation in Embedded Systems

Towards Scalable Electronics: Synthetic 2D Materials for Large-Area 2D Circuit Integration

On-Chip Fully Reconfigurable Artificial Neural Network in 16 nm FinFET for Positron Emission Tomography

Secure Interface Design Leveraging Hardware/Software Support

The 2024 Magnonics Roadmap

Error estimates for SUPG-stabilised Dynamical Low Rank Approximations

2D Nanosystems: Applications of 2D Semiconductors for In-Memory Computing

Low Power LDPC Decoding by Reliable Voltage Down-Scaling

Chaosity: Understanding Contemporary NUMA-architectures