Publication

A Full-Custom Time-Domain Unary Sorter for Soft-Information Decoding in 65 nm CMOS

2026

Abstract

We present a full-custom time-domain (TD) unary sorter for soft-information decoding with 5-bit quantized inputs. The design exploits a time-domain unary representation combined with a bitonic sorting network to efficiently order large numbers of log-likelihood ratios (LLRs) while outputting only their indices. Implemented in a 65 nm CMOS process, the proposed sorter achieves substantially lower latency compared to conventional digital and unary designs, while also reducing area and power relative to digital implementations, making it well-suited for efficient ultra-low-latency soft-decision decoding. Furthermore, the time-domain unary representation allows trading a small amount of sorting accuracy for even lower latency, which is acceptable in many soft-decision decoding applications such as ordered reliability bits guessing random additive noise decoding (ORBGRAND) and Chase-type error-correcting decoders.

Official source

https://infoscience.epfl.ch/entities/publication/fd038734-7648-4979-97be-e5958ab1194e

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2026

Abstract

Official source

https://infoscience.epfl.ch/entities/publication/fd038734-7648-4979-97be-e5958ab1194e

About this result

Related concepts (32)

Error correction code

In computing, telecommunication, information theory, and coding theory, forward error correction (FEC) or channel coding is a technique used for controlling errors in data transmission over unreliable or noisy communication channels. The central idea is that the sender encodes the message in a redundant way, most often by using an error correction code or error correcting code (ECC). The redundancy allows the receiver not only to detect errors that may occur anywhere in the message, but often to correct a limited number of errors.

Viterbi decoder

A Viterbi decoder uses the Viterbi algorithm for decoding a bitstream that has been encoded using a convolutional code or trellis code. There are other algorithms for decoding a convolutionally encoded stream (for example, the Fano algorithm). The Viterbi algorithm is the most resource-consuming, but it does the maximum likelihood decoding. It is most often used for decoding convolutional codes with constraint lengths k≤3, but values up to k=15 are used in practice. Viterbi decoding was developed by Andrew J.

65 nm process

The 65 nm process is an advanced lithographic node used in volume CMOS (MOSFET) semiconductor fabrication. Printed linewidths (i.e. transistor gate lengths) can reach as low as 25 nm on a nominally 65 nm process, while the pitch between two lines may be greater than 130 nm. For comparison, cellular ribosomes are about 20 nm end-to-end. A crystal of bulk silicon has a lattice constant of 0.543 nm, so such transistors are on the order of 100 atoms across. By September 2007, Intel, AMD, IBM, UMC and Chartered were also producing 65 nm chips.