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An event-driven analogue-to-digital converter (ADC) architecture is proposed. The proposed architecture has less sensitivity to amplifier and DAC nonlinearity, and reduces the swing and dynamic common-mode range requirement of the operational transconductance amplifier and comparators, respectively. The efficiency of the ADC is confirmed by detailed circuit simulations.
Marco Mattavelli, Catherine Dehollain, Diego Ruben Barrettino, Kerim Türe, Mustafa Besirli