Kyojin Choo
This person has left EPFL
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This person has left EPFL
Expertise Compact and energy-efficient ADCLow-power sensor interface circuitmm-scale low power system Professor Kyojin Choo received his B.S. and M.S. degree in electrical engineering from Seoul National University, Seoul, Korea, in 2007 and 2009, respectively. In 2018, he received his Ph.D. degree at the University of Michigan, Ann Arbor, MI, USA.From 2009 to 2013, he was with Image Sensor Development Team of Samsung Electronics, Yong-In, Korea, where he designed signal readout chains for mobile/DSLR image sensors. From 2018 to 2021, he was with University of Michigan, Ann Arbor, MI, USA, as a Post-Doctoral Research Fellow, and he recently joined Swiss Federal Institute of Technology of Lausanne (EPFL), Switzerland, as an Assistant Professor. He holds more than 20 US patents and his research interests include charge-domain circuits, sensor interfaces, energy converters, high-speed links/timing generators, and millimeter-scale integrated systems. ResearchCharge-Domain Analog/Mixed-Signal Circuits Analog/mixed-signal circuits traditionally have relied on continuous-time, static-power elements. However, there is a rising opportunity for circuits that focus on "charge" as the main mode of implementing electrical functions. These circuits are efficient as they inherently focus on energy, and provide useful characteristics (such as, noise-efficiency, dynamicity, reusability, scalability) that previous generation analog/mixed-signal circuits could not. Our group is pioneering this newfound design approach to demonstrate highly resource-efficient circuits for applications in energy management, sensor front-end, and communication circuits.Compact ADC for Array Based Applications The next wave of circuit applications is enabled by an array of high-performance analogs (and ADCs). These emerging applications include 5G/6G MIMO transceivers, in-memory compute arrays, >100Gbps serial-links, neural probe interfaces, 3D imagers, and many more things to come. Yet, conventional analog circuits greatly discount the effect of size, hence it adversely affects the system cost and robustness when used in an array. I find opportunities in this regard to make them more compact and energy-efficient resorting to novel design approaches (e.g., the charge-injection cell technique for ADCs) that focus on improving performance per area of these analogs. With these techniques, our group intends to further scale down analog circuits by design.Low-Power and Small Sensors/Actuators Interface As battery life and production cost are directly linked to the commercial success of IoT and wearables, enabling a family of low-energy sensors/actuators is becoming highly important. Wearables based on low-power sensors/actuators (in milli-to-micro Watts) have successfully debuted as a commercial product. Yet, the requirement for the battery has it conform to a rather strange form factor. Our group believes that enabling a lower power family of sensors/actuators (in nano-Watts), and making them much smaller would enable the artistic design of these everyday things while providing the convenience of modern electronics.
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