Publication

MOMS-based Programmable Sampling Rate Converters

Philippe Thévenaz
2009
Journal Articles

Abstract

In this paper design options when implementing programmable sampling rate converters are discussed. The theory and performance of the classical and new converters based on maximum order and minimum support (MOMS) splines is presented. FPGA designs are shown in term of resources used, latency, and the quality of results. Second-order (or, equivalently, linear or triangular) and sine-based benchmarks are described and evaluated that show the advantages of the new MOMS-based sampling rate converters. The FPGA synthesis results of 7 different converters are presented as proof of concept.

Official source

https://infoscience.epfl.ch/entities/publication/e039b3ce-c6ab-44f0-8cfe-372ae3208cfc

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Philippe Thévenaz
2009
Journal Articles

Abstract

Official source

https://infoscience.epfl.ch/entities/publication/e039b3ce-c6ab-44f0-8cfe-372ae3208cfc

About this result

Related concepts (19)

Field-programmable gate array

A field-programmable gate array (FPGA) is an integrated circuit designed to be configured after manufacturing. The FPGA configuration is generally specified using a hardware description language (HDL), similar to that used for an application-specific integrated circuit (ASIC). Circuit diagrams were previously used to specify the configuration, but this is increasingly rare due to the advent of electronic design automation tools. FPGAs contain an array of programmable logic blocks, and a hierarchy of reconfigurable interconnects allowing blocks to be wired together.

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