Improvements to Boolean resynthesis

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Logic rewriting is a powerful optimization technique that replaces small sections of a Boolean network with better implementations. Typically, exact synthesis is used to compute optimum replacement on-the-fly, with possible support for Boolean don't cares. ...

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Factored form is a powerful multi-level representation of a Boolean function that readily translates into an implementation of the function in CMOS technology. In particular, the number of literals in a factored form correlates strongly with the number of ...

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The paper presents a novel DAG-aware Boolean rewriting algorithm for restructuring combinational logic before technology mapping. The algorithm, called window rewriting, repeatedly selects small parts of the logic and replaces them with more compact implem ...

Approximate logic synthesis is an emerging field that tolerates errors in the synthesized logic circuits for better optimization quality. Indeed, in many computing problems, the requirement of preserving the exact functionality either results in unnecessar ...

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We propose a new approach for normalization and simplification of logical formulas. Our approach is based on algorithms for lattice-like structures. Specifically, we present two efficient algorithms for computing a normal form and deciding the word problem ...

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We present an all-digital application specific integrated circuit (ASIC) that implements Bluetooth Low Energy (BLE)-compatible backscatter communication. The ASIC was fabricated in a 65 nm CMOS process and occupies an active area of 0.12 mm(2) while consum ...

Improvements to Boolean resynthesis

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Contemporary Logic Synthesis: with an Application to AQFP Circuit Optimization

Algebraic and Boolean Methods for SFQ Superconducting Circuits

Scalable Logic Rewriting Using Don’t Cares

Strain relaxation and multidentate anchoring in n-type perovskite transistors and logic circuits

Improving Standard-Cell Design Flow using Factored Form Optimization

Unraveling the Electrochemical Electrode Coupling in Integrated Organic Electrochemical Transistors

MOD2IR: High-Performance Code Generation for a Biophysically Detailed Neuronal Simulation DSL

Automating the Design of Programmable Interconnect for Reconfigurable Architectures

New ultrahigh-speed device concepts: from THz nanoplasma devices to glass-like electronics for neuromorphic computation

2D Nanosystems: Applications of 2D Semiconductors for In-Memory Computing

Stable Nonconvex-Nonconcave Training via Linear Interpolation

Power Transformer Fault Diagnosis Using Neural Network Optimization Techniques

Utilizing XMG-based Synthesis to Preserve Self-Duality for RFET-Based Circuits

Electronic transport in graphene nanoribbon junctions

Boolean Rewriting Strikes Back: Reconvergence- Driven Windowing meets Resynthesis

Logic Synthesis From Incomplete Specifications Using Disjoint Support Decomposition

The irreducibility of vision: Gestalt, crowding and the fundamentals of vision

Formula Normalizations in Verification

Exploring negative capacitance and neuromorphic devices based on CMOS-compatible ferroelectric HfO2

An All-Digital 1 Mbps, 57 pJ/bit Bluetooth Low Energy (BLE) Backscatter ASIC in 65 nm CMOS