SixTrack Version 5: Status and New Developments

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Computer systems rely heavily on abstraction to manage the exponential growth of complexity across hardware and software. Due to practical considerations of compatibility between components of these complex systems across generations, developers have favou ...

The increasing demand for computing power and the emergence of heterogeneous computing architectures have driven the exploration of innovative techniques to address current limitations in both the compute and memory subsystems. One such solution is the use ...

Virtual Memory (VM) is a critical programming abstraction that is widely used in various modern computing platforms. With the rise of datacenter computing and birth of planet-scale online services, the semantic and capacity requirements from memory have ev ...

Machine learning and data processing algorithms have been thriving in finding ways of processing and classifying information by exploiting the hidden trends of large datasets. Although these emerging computational methods have become successful in today's ...

A method of accessing a memory space of a memory device with a decoder, the memory space having faults, including the steps of performing a memory access operation by an electronic device to a access a logical memory space of the memory device, and randomi ...

Computer systems designers are building cache hierarchies with higher capacity to capture the ever-increasing working sets of modern workloads. Cache hierarchies with higher capacity improve system performance but shift the performance bottleneck to addres ...

Among the different types of DRAMs, gain-cell embedded DRAM (GC-eDRAM) is a compact, low-power and CMOS-compatible alternative to conventional SRAM. GC-eDRAM achieves high memory density as it relies on a storage cell that can be implemented with as few as ...

Among the different types of dynamic random-access memories (DRAMs), gain-cell embedded DRAM (GC-eDRAM) is a compact, low-power, and CMOS-compatible alternative to conventional static random-access memory (SRAM). GC-eDRAM achieves high memory density, as i ...

With explosive growth in dataset sizes and increasing machine memory capacities, per-application memory footprints are commonly reaching into hundreds of GBs. Such huge datasets pressure the TLB, resulting in frequent misses that must be resolved through a ...

Modern applications accumulate data at an exponentially increasing rate and traditional database systems struggle to keep up. Decision support systems used in industry, rely heavily on data analysis, and require real-time responses irrespective of data siz ...

Virtual memory (VM) is a crucial abstraction in modern computer systems at any scale, from handheld devices to datacenters. VM provides programmers the illusion of an always sufficiently large and linear memory, making programming easier. Although the core ...

Manual software testing is laborious and prone to human error. Yet, among practitioners, it is the most popular method for quality assurance. Automating the test case generation promises better effectiveness, especially for exposing corner-case bugs. Symbo ...

Even though main memory is becoming large enough to fit most OLTP databases, it may not always be the best option. OLTP workloads typically exhibit skewed access patterns where some records are hot (frequently accessed) but many records are cold (infrequen ...

The main aim of this thesis is to examine the advantages of 3D stacking applied to microprocessors and related integrated microprocessor systems in the architectural level. In the succession of years microprocessors are aiming towards lower power consumpti ...

Most of existing motorway traffic safety studies using disaggregate traffic flow data aim at developing models for identifying real-time traffic risks by comparing pre-crash and non-crash conditions. One of serious shortcomings in those studies is that non ...

In this paper, we present a flexible architecture for an LDPC decoder that fully exploits the structure of the codes defined in the DVB-T2 standard (Digital Video Broadcasting - Second Generation Terrestrial). We propose a processor and memory architecture ...

Current general-purpose memory allocators do not provide sufficient speed or flexibility for modern highperformance applications. To optimize metrics like performance, memory usage and energy consumption, software engineers often write custom allocators fr ...

Prior research demonstrates that temporal memory streaming and related address-correlating prefetchers improve performance of commercial server workloads though increased memory level parallelism. Unfortunately, these prefetchers require large on-chip meta ...

One of the most celebrated results of the theory of distributed computing is the impossibility, in an asynchronous system of

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processes that communicate through shared memory registers, to solve the set agreement problem where the processes need to deci ...

SixTrack Version 5: Status and New Developments

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Secure Interface Design Leveraging Hardware/Software Support

Intermediate Address Space: virtual memory optimization of heterogeneous architectures for cache-resident workloads

Rebooting Virtual Memory with Midgard

2D Nanosystems: Applications of 2D Semiconductors for In-Memory Computing

Method for reading and writing unreliable memories and a corresponding memory controller device and memory

Rebooting Virtual Memory with Midgard

Gain-Cell Embedded DRAMs: Modeling and Design Space

Gain-Cell Embedded DRAMs: Modeling and Design Space

Prefetched Address Translation

Timely and cost-efficient data exploration through adaptive tuning

Near-Memory Address Translation

Improving Scalability of Symbolic Execution for Software with Complex Environment Interfaces

Enabling efficient OS paging for main-memory OLTP databases

Towards Multi-Fabric 3D Integration Architectures

Methodology for Developing Real-time Motorway Traffic Risk Identification Models Using Individual Vehicle Data

A Novel Conflict-Free Memory and Processor Architecture for DVB-T2 LDPC Decoding

Simulation of High-Performance Memory Allocators

Practical Off-chip Meta-data for Temporal Memory Streaming

Sharing is Harder than Agreeing