Publication

Prefetched Address Translation

Edouard Bugnion, Dmitrii Ustiugov
2019
Conference Papers

Abstract

With explosive growth in dataset sizes and increasing machine memory capacities, per-application memory footprints are commonly reaching into hundreds of GBs. Such huge datasets pressure the TLB, resulting in frequent misses that must be resolved through a page walk - a long-latency pointer chase through multiple levels of the in-memory radix tree-based page table.

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Prefetched Address Translation

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