Unified prefetching into instruction cache and branch target buffer

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Unified prefetching into instruction cache and branch target buffer

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EdgeAI-Aware Design of In-Memory Computing Architectures

Green Cryptography and Other Optimisations

Instruction-Level Power Side-Channel Leakage Evaluation of Soft-Core CPUs on Shared FPGAs

HPCache: memory-efficient OLAP through proportional caching revisited

Imprecise Store Exceptions

Rebooting Virtual Memory with Midgard

uKharon: A Membership Service for Microsecond Applications

Fast correlation function calculator A high-performance pair-counting toolkit

Determining an optimum quantity of interleaved instruction streams of defined coroutines

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Request, Coalesce, Serve, and Forget: Miss-Optimized Memory Systems for Bandwidth-Bound Cache-Unfriendly Applications on FPGAs

HPCache: Memory-Efficient OLAP Through Proportional Caching

Electrical-Level Attacks on CPUs, FPGAs, and GPUs: Survey and Implications in the Heterogeneous Era

VWR2A: A Very-Wide-Register Reconfigurable-Array Architecture for Low-Power Embedded Devices

Columnar Storage Optimization and Caching for Data Lakes

Real-Time Nonlinear Model Predictive Control for Fast Mechatronic Systems