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In this paper, a 4.6 GHz frequency synthesizer integrated circuit for Cesium-based miniature atomic clocks is presented. Based on a fractional-N phase-locked loop (PLL) with sigma-delta modulator, the chip features a frequency resolution below 10E-3 Hz at its output, allowing a tuning resolution of 10E-13. This value was measured on the circuit which is integrated into a 130 nm CMOS process. It consumes 15 mW, features an output phase noise of -76 dBc/Hz @ 1 kHz offset from the 4.6 GHz carrier, and provides a programmable output power from -10 to 0 dBm.
Edoardo Charbon, Andrea Ruffino, Yatao Peng