Diseño de redes en chip de propósito específico con información de rutado físico

Chat with Graph Search

Ask any question about EPFL courses, lectures, exercises, research, news, etc. or try the example questions below.

DISCLAIMER: The Graph Chatbot is not programmed to provide explicit or categorical answers to your questions. Rather, it transforms your questions into API requests that are distributed across the various IT services officially administered by EPFL. Its purpose is solely to collect and recommend relevant references to content that you can explore to help you answer your questions.

A de facto standard approach in solving computer vision tasks is to use a common high-resolution camera and choose its placement on an agent based on human intuition. On the other hand, extremely simple and well-designed visual sensors found throughout nat ...

Electronic devices play an irreplaceable role in our lives. With the tightening time to market, exploding demand for computing power, and continuous desire for smaller, faster, less energy-consuming, and lower-cost chips, computer-aided design for electron ...

In the past decades, a significant increase of the transistor density on a chip has led to exponential growth in computational power driven by Moore's law. To overcome the bottleneck of traditional von-Neumann architecture in computational efficiency, effo ...

The increasing complexity of transformer models in artificial intelligence expands their computational costs, memory usage, and energy consumption. Hardware acceleration tackles the ensuing challenges by designing processors and accelerators tailored for t ...

Two design studios were successively taught in two schools of architecture: one at the Harvard Graduate School of Design (GSD) and the other at the Swiss Federal Institute of Technology in Lausanne (EPFL) in Lausanne, Switzerland, based on "A Global Morato ...

This book has been designed for instructors in higher education or adult training who wish to develop a new course or revise an existing one. It adopts a practical, visual, and modular approach based on the principle of constructive alignment. At its heart ...

Superconducting electronics provide us with cryogenic digital circuits that can rival established technologies in performance and energy consumption. Today, the lack of tools for the design of large-scale integrated superconducting circuits is a major obst ...

Verification and testing of hardware heavily relies on cycle-accurate simulation of RTL. As single-processor performance is growing only slowly, conventional, single-threaded RTL simulation is becoming impractical for increasingly complex chip designs and ...

This article reports on the current state of the OBI DICT project, a bilingual e-dictionary of oracle-bone inscriptions (OBI), incorporating artificial intelligence (AI) image recognition technology. It first provides a brief overview of the development of ...

High-entropy alloys (HEAs), containing several metallic elements in near-equimolar proportions, have long been of interest for their unique mechanical properties. More recently, they have emerged as a promising platform for the development of novel heterog ...

The official Spherical Tokamak for Energy Production mission aims to demonstrate the ability to generate net electricity from fusion with the STEP Prototype Power plant. One of the key technological and engineering challenges in fusion power plants is mana ...

In the growing field of closed-loop neuromodulation, designing power-and area-efficient analog front-ends (AFEs) for neural recording poses a significant challenge. Thus, an effective design flow is needed to ensure system's hardware efficiency and to auto ...

Driven by the demand for real-time processing and the need to minimize latency in AI algorithms, edge computing has experienced remarkable progress. Decision-making AI applications stand out for their heavy reliance on data-centric operations, predominantl ...

Shared Virtual Memory (SVM) is a mechanism that allows host-side applications and FPGA accelerators to access the same virtual address space. It enables accelerating algorithms with unpredictable memory access patterns by making transparent pointer sharing ...

The paper details the process of developing the ITER Plasma Control System (PCS), that is, how to design and deploy it systematically, in the most efficient and effective manner. The integrated nature of the ITER PCS, with its multitude of coupled control ...

Dual-channel gate driver is commonly utilized in the industry for accommodating the widespread use of half-bridge power modules. As wide-bandgap devices become increasingly prevalent due to their superior switching characteristics compared with conventiona ...

The global construction industry contributes to 37% of carbon emissions associated to both building operations and construction. To help achieve the net-zero targets set by 2050, it is mandated to achieve a 50% reduction in carbon emissions by 2030. As we ...

The design and discovery of potential novel materials is critical for the advancement of climate change mitigation technologies. In this respect, metal-organic frameworks (MOFs) have received considerable attention over the last two decades. The combinatio ...

The demise of Moore's Law and Dennard scaling has resulted in diminishing performance gains for general-purpose processors, and so has prompted a surge in academic and commercial interest for hardware accelerators. Specialized hardware has already redefine ...

Modern hardware is increasingly complex, requiring increasing effort to understand in order to carefully engineer systems for optimal performance and effective utilization. Moreover, established design principles and assumptions are not portable to modern ...

Diseño de redes en chip de propósito específico con información de rutado físico

Chat with Graph Search

How Far Can a 1-Pixel Camera Go? Solving Vision Tasks Using Photoreceptors and Computationally Designed Visual Morphology

Contemporary Logic Synthesis: with an Application to AQFP Circuit Optimization

Towards Scalable Electronics: Synthetic 2D Materials for Large-Area 2D Circuit Integration

Accelerator-driven Data Arrangement to Minimize Transformers Run-time on Multi-core Architectures

Teaching Not To

Course Design - A Visual and Modular Approach

Technology-Aware Logic Synthesis for Superconducting Electronics

Highly Parallel RTL Simulation

The Current State of the OBI DICT Project: A Bilingual e-Dictionary of Oracle-Bone Inscriptions with AI Image Recognition

Surface segregation in high-entropy alloys from alchemical machine learning

Models implemented in the methodological approach to design the initial STEP first wall contour

A Systematic Design Flow for Compact and Efficient Analog Front-Ends in Closed-Loop Neuromodulation Systems

EdgeAI-Aware Design of In-Memory Computing Architectures

FlexiMem: Flexible Shared Virtual Memory for PCIe-attached FPGAs

Strategy to systematically design and deploy the ITER plasma control system: A system engineering and model-based design approach

A Dual-Channel Gate Driver Design with Active Voltage Balancing Circuit for Series Connection of SiC MOSFETs

An explorative method to support design decisions based on carbon constraints and daylight sufficiency needs

A diversity-driven discovery of potential nanoporous materials for energy-related applications

Building Chips Faster: Hardware-Compiler Co-Design for Accelerated RTL Simulation

Chaosity: Understanding Contemporary NUMA-architectures