Publication

Reducing the Pressure on Routing Resources of FPGAs with Generic Logic Chains

Paolo Ienne
2011
Conference Papers

Abstract

Routing resources in modern FPGAs use 50% of the silicon real estate and are significant contributors to critical path delay and power consumption; the situation gets worse with each successive process generation, as transistors scale more effectively than wires. To cope with these challenges, FPGA architects have divided wires into local and global categories and introduced fast dedicated carry chains between adjacent logic cells, which reduce routing resource usage for certain arithmetic circuits (primarily adders and subtractors).

Official source

https://infoscience.epfl.ch/entities/publication/39677136-b053-4c83-abc6-8f871ba00f47

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Paolo Ienne
2011
Conference Papers

Abstract

Official source

https://infoscience.epfl.ch/entities/publication/39677136-b053-4c83-abc6-8f871ba00f47

About this result

Related concepts (32)

Transistor count

The transistor count is the number of transistors in an electronic device (typically on a single substrate or "chip"). It is the most common measure of integrated circuit complexity (although the majority of transistors in modern microprocessors are contained in the cache memories, which consist mostly of the same memory cell circuits replicated many times). The rate at which MOS transistor counts have increased generally follows Moore's law, which observed that the transistor count doubles approximately every two years.

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