Portable and scalable parallelism for multi-core and reconfigurable hardware using dataflow programs

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Randomized versus Deterministic Implementations of Concurrent Data Structures

Dan Alistarh

One of the key trends in computing over the past two decades has been increased distribution, both at the processor level, where multi-core architectures are now the norm, and at the system level, where many key services are currently distributed overmulti ...

EPFL2012

Lightweight Modular Staging and Embedded Compilers : Abstraction without Regret for High-Level High-Performance Programming

Tiark Rompf

Programs expressed in a high-level programming language need to be translated to a low-level machine dialect for execution. This translation is usually accomplished by a compiler, which is able to translate any legal program to equivalent low-level code. B ...

EPFL2012

Shortening design time through multiplatform simulations with a portable OpenCL golden-model: the LDPC decoder case

Paolo Ienne, Andreas Peter Burg, Georgios Karakonstantis, David Novo Bruna, Madhura Purnaprajna, Gabriel Falcao Paiva Fernandes

Hardware designers and engineers typically need to explore a multi-parametric design space in order to ﬁnd the best conﬁguration for their designs using simulations that can take weeks to months to complete. For example, designers of special purpose chips ...

2012

GPGPU-Accelerated Parallel and Fast Simulation of Thousand-core Platforms

David Atienza Alonso, Luca Benini, Martino Ruggiero, Shivani Raghav

The multicore revolution and the ever-increasing complexity of computing systems is dramatically changing system design, analysis and programming of computing platforms. Future architectures will feature hundreds to thousands of simple processors and on-ch ...

IEEE/ACM Press2011

A High–Performance Parallel Implementation of the Chambolle Algorithm

David Atienza Alonso, Abdulkadir Akin, Ivan Beretta, Alessandro Antonio Nacci

The determination of the optical flow is a central problem in image processing, as it allows to describe how an image changes over time by means of a numerical vector field. The estimation of the optical flow is however a very complex problem, which has be ...

ACM and IEEE Press2011

3D Thermal-Aware Floorplanner for Many-Core Single-Chip Systems

David Atienza Alonso, José Luis Ayala Rodrigo

Heat removal and power density distribution delivery have become two major reliability concerns in 3D stacked technology. In this paper, we propose a thermal-driven 3D floorplanner. Our contributions include: (1) a novel multi-objective formulation to cons ...

IEEE Press2011

MPSoC Design using Application-Specific Architecturally Visible Communication

Edoardo Charbon, Paolo Ienne, Philip Brisk, Ties Jan Henderikus Kluter

This paper advocates the placement of Architecturally Visible Communication (AVC) buffers between adjacent cores in MPSoCs to provide high-throughput communication for streaming applications. Producer/consumer relationships map poorly onto cache-based MPSo ...

Springer-Verlag2009

Through Silicon Via-Based Grid for Thermal Control in 3D Chips

Yusuf Leblebici, David Atienza Alonso, José Luis Ayala Rodrigo, Arvind Raj Mahankali Sridhar

3D stacked chips have become a promising integration technology for modern systems. The complexity reached in multi-processor systems has increased the communication delays between processing cores, and an effective way to diminish this impact on communica ...

Springer2009

Deep-submicron embedded processor architectures for high-performance, low-cost and low-power

Sylvain Aguirre

Because the market has an insatiable appetite for new functionality, performance is becoming an increasingly important factor. The telecommunication and network domains are especially touched by this phenomenon but they are not the only ones. For instance, ...

EPFL2007

A Complete Multi-Processor System-on-Chip FPGA-Based Emulation Framework

Giovanni De Micheli, David Atienza Alonso, Luca Benini, Pablo Garcia del Valle

With the growing complexity in consumer embedded products and the improvements in process technology, Multi-Processor System-On-Chip (MPSoC) architectures have become widespread. These new systems are very complex to design as they must execute multiple co ...

2006