Publication

Self-Checking Ripple-Carry Adder with Ambipolar Silicon Nanowire FET

2013
Conference Papers

Abstract

For the rapid adoption of new and aggressive technologies such as ambipolar Silicon NanoWire (SiNW), addressing fault-tolerance is necessary. Traditionally, transient fault detection implies large hardware overhead or performance decrease compared to permanent fault detection. In this paper, we focus on on-line testing and its application to ambipolar SiNW. We demonstrate on self - checking ripple - carry adder how ambipolar design style can help reduce the hardware overhead. When compared with equivalent CMOS process, ambipolar SiNW design shows a reduction in area of at least 56% (28%) with a decreased delay of 62% (6%) for Static (Transmission Gate) design style.

Official source

https://infoscience.epfl.ch/entities/publication/2336e356-edd3-4620-9d23-7e84adb1d75e

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2013
Conference Papers

Abstract

Official source

https://infoscience.epfl.ch/entities/publication/2336e356-edd3-4620-9d23-7e84adb1d75e

About this result

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Self-Checking Ripple-Carry Adder with Ambipolar Silicon Nanowire FET

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