Publications related to Design Optimization of 3D Multi-Processor System-on-Chip with Integrated Flow Cell Arrays

Related publications (30)

Multi-Ported GC-eDRAM Bitcell with Dynamic Port Configuration and Refresh Mechanism

Embedded memories occupy an increasingly dominant part of the area and power budgets of modern systems-on-chips (SoCs). Multi-ported embedded memories, commonly used by media SoCs and graphical processing units, occupy even more area and consume higher pow ...

MDPI2024

Thermo-optic epsilon-near-zero effects

Camille Sophie Brès, Marco Clementi, Jiaye Wu

Nonlinear epsilon-near-zero (ENZ) nanodevices featuring vanishing permittivity and CMOS-compatibility are attractive solutions for large-scale-integrated systems-on-chips. Such confined systems with unavoidable heat generation impose critical challenges fo ...

Nature Portfolio2024

A modular multiple frequency inductive link to wirelessly power multiple miniaturized implants

Sandro Carrara, Diego Ghezzi, Gian Luca Barbruni

A modular multiple frequency coils inductive link system to wirelessly provide power for at least a medical implant at an output of a receiving coil, whereby the receiving coil is configured to be implanted in an organism. The modular multiple frequency co ...

2024

The 2024 Magnonics Roadmap

Dirk Grundler, Thomas Yu, Ping Che, Qi Wang

Magnonics is a research field that has gained an increasing interest in both the fundamental and applied sciences in recent years. This field aims to explore and functionalize collective spin excitations in magnetically ordered materials for modern informa ...

2024

Advanced Silicon and SWIR Single-Photon Avalanche Diodes: Design, Simulation, and Characterization

Ekin Kizilkan

Low-level light detection with high spatial and timing accuracy is a growing area of interest by virtue of applications such as light detection and ranging (LiDAR), biomedical imaging, time-resolved Raman spectroscopy, and quantum applications. Single-phot ...

EPFL2024

Graph generative deep learning models with an application to circuit topologies

Igor Krawczuk

Modern integrated circuits are tiny yet incredibly complex technological artifacts, composed of millions and billions of individual structures working in unison. Managing their complexity and facilitating their design drove part of the co-evolution of mode ...

EPFL2024

Eco-Conscious Approach to Wireless Gas Monitoring With a Hybrid Printed Passive Sensor Tag

Sandro Carrara, Johanna Zikulnig

Addressing the environmental impact of electronic waste in biomedical sensing, an eco-conscious approach to the realization of a Chitosan-based Acetone sensor tag for wireless gas monitoring is presented. The fabrication involves inkjet printing of silver ...

Ieee-Inst Electrical Electronics Engineers Inc2024

3D diffractive optics for linear interconnects and nonlinear processing

Niyazi Ulas Dinç

The optical domain presents potential avenues for enhancing both computing and communication due to its inherent properties of bandwidth, parallelism, and energy efficiency. This research focuses on harnessing 3-Dimensional (3D) diffractive optics for nove ...

EPFL2024

General and Unified Model of the Power Flow Problem in Multiterminal AC/DC Networks

Mario Paolone, Willem Lambrichts

This paper proposes a generic and unified model of the power flow (PF) problem for multiterminal hybrid AC/DC networks. The proposed model is an extension of the standard AC-PF. The DC network is treated as an AC one and, in addition to the Slack, PV and P ...

IEEE Institute of Electrical and Electronics Engineers2024

Accelerator-driven Data Arrangement to Minimize Transformers Run-time on Multi-core Architectures

David Atienza Alonso, Giovanni Ansaloni, Alireza Amirshahi

The increasing complexity of transformer models in artificial intelligence expands their computational costs, memory usage, and energy consumption. Hardware acceleration tackles the ensuing challenges by designing processors and accelerators tailored for t ...

2024

On-Chip Fully Reconfigurable Artificial Neural Network in 16 nm FinFET for Positron Emission Tomography

Edoardo Charbon, Claudio Bruschini, Emanuele Ripiccini, Andrada Alexandra Muntean

Smarty is a fully-reconfigurable on-chip feed-forward artificial neural network (ANN) with ten integrated time-to-digital converters (TDCs) designed in a 16 nm FinFET CMOS technology node. The integration of TDCs together with an ANN aims to reduce system ...

Ieee-Inst Electrical Electronics Engineers Inc2024

Emulating Multimemristive Behavior of Silicon Nanowire-Based Biosensors by Using CMOS-Based Implementations

Kapil Bhardwaj, Sandro Carrara, Junrui Chen

The research presented in this article draws inspiration from previous efforts aimed at replicating the functions of various solid-state memristors using a variety of materials. The memristor circuit emulator serves as a cost-effective tool for circuit des ...

Ieee-Inst Electrical Electronics Engineers Inc2024

Integrated Wireless Power, Data Communication, and Thermal Sensing System for Autonomous Multisite Brain Implants

Mohammad Javad Karimi

Implanted medical devices (IMDs) have been widely developed to support the monitoring and recording of biological data inside the body or brain. Wirelessly powered IMDs, a subset of implantable electronics, have been proposed to eliminate the limitations r ...

EPFL2024

Generation of entangled photon pairs from a silicon bichromatic photonic crystal cavity

Matteo Galli, Marco Clementi

Integrated quantum photonics leverages the on-chip generation of nonclassical states of light to realize key functionalities of quantum devices. Typically, the generation of such nonclassical states relies on whispering gallery mode resonators, such as int ...

Aip Publishing2024

Evaluating, Exploiting, and Hiding Power Side-Channel Leakage of Remote FPGAs

Ognjen Glamocanin

The pervasive adoption of field-programmable gate arrays (FPGAs) in both cyber-physical systems and the cloud has raised many security issues. Being integrated circuits, FPGAs are susceptible to fault and power side-channel attacks, which require physical ...

EPFL2023

Building Chips Faster: Hardware-Compiler Co-Design for Accelerated RTL Simulation

Sahand Kashani

The demise of Moore's Law and Dennard scaling has resulted in diminishing performance gains for general-purpose processors, and so has prompted a surge in academic and commercial interest for hardware accelerators. Specialized hardware has already redefine ...

EPFL2023

Automating the Design of Programmable Interconnect for Reconfigurable Architectures

Stefan Nikolic

With Moore's law coming to an end, increasingly more hope is being put in specialized hardware implemented on reconfigurable architectures such as Field-Programmable Gate Arrays (FPGAs). Yet, it is often neglected that these architectures themselves experi ...

EPFL2023

Exploring brain-inspired multi-core heterogeneous hardware templates for low-power biomedical embedded systems

Benoît Walter Denkinger

The miniaturization of integrated circuits (ICs) and their higher performance and energy efficiency, combined with new machine learning algorithms and applications, have paved the way to intelligent, interconnected edge devices. In the medical domain, they ...

EPFL2023

Design Space Exploration for Partitioning Dataflow Program on CPU-GPU Heterogeneous System

Marco Mattavelli, Simone Casale Brunet, Aurélien François Gilbert Bloch

Dataflow programming is a methodology that enables the development of high-level, parametric programs that are independent of the underlying platform. This approach is particularly useful for heterogeneous platforms, as it eliminates the need to rewrite ap ...

SPRINGER2023

Chaosity: Understanding Contemporary NUMA-architectures

Andreea Nica, Anastasia Ailamaki, Viktor Sanca, Syed Mohammad Aunn Raza, Hamish Mcniece Hill Nicholson

Modern hardware is increasingly complex, requiring increasing effort to understand in order to carefully engineer systems for optimal performance and effective utilization. Moreover, established design principles and assumptions are not portable to modern ...

2023