Publications related to CMOS 3D-Extended Metal Gate ISFETs with Near Nernstian Ion Sensitivity

Related publications (11)

Integrated electronics for time-of-flight positron emission tomography photodetectors

Positron emission tomography is a nuclear imaging technique well known for its use in oncology for cancer diagnosis and staging. A PET scanner is a complex machine which comprises photodetectors placed in a ring configuration that detect gamma photons gen ...

EPFL2023

Effect of hysteretic and non-hysteretic negative capacitance on tunnel FETs DC performance

Mihai Adrian Ionescu, Farzan Jazaeri, Igor Stolichnov, Ali Saeidi

This work experimentally demonstrates that the negative capacitance effect can be used to significantly improve the key figures of merit of tunnel field effect transistor (FET) switches. In the proposed approach, a matching condition is fulfilled between a ...

2018

Reconfigurable electronics based on metal-insulator transition : steep-slope switches and high frequency functions enabled by Vanadium Dioxide

Wolfgang Amadeus Vitale

The vast majority of disruptive innovations in science and technology has been originated from the discovery of a new material or the way its properties have been exploited to create novel devices and systems. New advanced nanomaterials will have a lasting ...

EPFL2016

Design Methodologies and CAD for Emerging Nanotechnologies

Shashi Kanth Bobba

With technology scaling reaching the fundamental limits of Si-CMOS in the near future, the semiconductor industry is in quest for innovation from various disciplines of integrated circuit (IC) design. At a fundamental level, technology forms the main drive ...

EPFL2013

K-band single-chip electron spin resonance detector

Jens Anders

We report on the design, fabrication, and characterization of an integrated detector for electron spin resonance spectroscopy operating at 27 GHz. The microsystem, consisting of an LC-oscillator and a frequency division module, is integrated onto a single ...

Academic Press Inc - Elsevier Science2012

Ambipolar silicon nanowire FETs with stenciled sub-µm metal gate

Giovanni De Micheli, Yusuf Leblebici, Jürgen Brugger, Andreea Veronica Savu, Davide Sacchetto

A fully CMOS compatible fabrication flow using low temperature a-Si LPCVD and stencil lithography has been developed and proved suitable for SiNW FinFETs having ambipolar conductance. The stencil mask has been demonstrated to be a real option for sub-micro ...

2010

Organic Thin Film Transistors on Flexible Polyimide Substrates Fabricated by Full Wafer Stencil Lithography

Mihai Adrian Ionescu, Jürgen Brugger, Andreea Veronica Savu, Katrin Sidler Arnet, Nenad Cvetkovic

This paper presents new results on miniaturized organic thin film transistors (TFT) fabricated on a spin coated polyimide (PI) film. Patterning steps, that are vital for the integrity and electrical performances of the organic TFT, were performed using res ...

Elsevier2010

Simulation of Double-Gate Silicon Tunnel FETs with a High-k Gate Dielectric

Katherine Boucart

The down-scaling of conventional MOSFETs has led to an impending power crisis, in which static power consumption is becoming too high. In order to improve the energy-efficiency of electronic circuits, small swing switches are interesting candidates to repl ...

EPFL2010

Subthreshold Leakage Reduction: A Comparative Study of SCL and CMOS Design

Yusuf Leblebici, Seyed Armin Tajalli

The large subthreshold leakage current of static CMOS logic circuits designed in modern nanometer-scale technologies is one of the main barriers for implementing ultra-low power digital systems. Subthreshold source-coupled logic (STSCL) circuits are based ...

IEEE2009

Three-dimensional electronic devices fabricated on a top-down silicon nanowire platform

Kirsten Emilie Moselund

For the past couple of decades the desire to add more complexity to a computer chip, while simultaneously reducing the cost per bit, has been accommodated by down-scaling. This approach has been extremely successful in the past, but like all good things it ...

EPFL2008

1T Memory Cell Based on PVDF-TrFE Field Effect Transistor

Mihai Adrian Ionescu, Nava Setter, Didier Bouvet, Igor Stolichnov, Sebastian Riester, Roman Gysel, Giovanni Antonio Salvatore

Interest in PVDF-TrFE copolymers as ferroelectric material for Memory application is driven by the prospect of having low cost, low operating voltage and fully organic device. Some previous studies reported FET designs using copolymers [refs 1,2] but none ...

2008