RDS: FPGA Routing Delay Sensors for Effective Remote Power Analysis Attacks

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RDS: FPGA Routing Delay Sensors for Effective Remote Power Analysis Attacks

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Contemporary Logic Synthesis: with an Application to AQFP Circuit Optimization

Automating the Design of Programmable Interconnect for Reconfigurable Architectures

Evaluating, Exploiting, and Hiding Power Side-Channel Leakage of Remote FPGAs

Improving Standard-Cell Design Flow using Factored Form Optimization

DFAulted: Analyzing and Exploiting CPU Software Faults Caused by FPGA-Driven Undervolting Attacks

An All-Digital 1.25 Mbps 5-Subcarrier OFDM Backscatter Uplink with Delta-Sigma Modulation for Improved Spurious-Free Dynamic Range

Comparison of Two in Pixel Source Follower Schemes for Deep Subelectron Noise CMOS Image Sensors

Thermal and Voltage-Aware Performance Management of 3D MPSoCs with Flow Cell Arrays and Integrated SC Converters

Design and management of three-dimensional multi-processor systems-on-chip with integrated flow cell arrays

Shrinking FPGA Static Power via Machine Learning-Based Power Gating and Enhanced Routing

Random flip-flop: adding quantum randomness to digital circuits for improved cyber security, artificial intelligence and more

Power Analysis Resilient SRAM Design Implemented with a 1% Area Overhead Impedance Randomization Unit for Security Applications

Polarity-Controllable Devices and Circuits for Doping-Free 2D Electronics

Energy-Efficient Design Techniques for High-Speed Wireline Serial Links

Doping-Free Complementary Logic Gates Enabled by Two-Dimensional Polarity-Controllable Transistors

A massively scalable Time-to-Digital Converter with a PLL-free calibration system in a commercial 130 nm process

Low-Latency High-Bandwidth Circuit and System Design for Trigger Systems in High Energy Physics

Architecture and Experimental Validation of a Low-Latency Phasor Data Concentrator

Three-Input Gates for Logic Synthesis

High-Speed ADC Design and Optimization for Wireline Links