Room-Temperature Negative Differential Resistance in Graphene Field Effect Transistors: Experiments and Theory

In this paper we demonstrate experimentally and discuss the negative differential resistance (NDR) in dual-gated graphene field effect transistors (GFETs) at room temperature for various channel lengths, ranging from 200 nm to 5 mu m. The GFETs were fabricated using chemically vapor-deposited graphene with a top gate oxide down to 2.5 nm of equivalent oxide thickness (EOT). We originally explain and demonstrate with systematic simulations that the onset of NDR occurs in the unipolar region itself and that the main mechanism behind NDR is associated with the competition between the specific field dependence of carrier density and the drift velocity in GFET. Finally, we show experimentally that NDR behavior can still be obtained with devices of higher EOTs; however, this comes at the cost of requiring higher bias values and achieving lower NDR level.