Home

Person

Giovanni Ansaloni

This person has left EPFL

About
Privacy
Disclaimer

Graph Chatbot

Related publications (67)

Page 3 of 4

A Reconfigurable High-Dynamic Range ∆Σ Front-End with Event-Based Decimation for Bandwidth-Efficient Implantable Neural Interfaces

David Atienza Alonso, Giovanni Ansaloni, Pasquale Davide Schiavone, Juan Pablo Sapriza Araujo

As the demand for high channel counts and high-resolution recordings of neural activity continues to grow, the increased power and data rate generated impose hard constraints on the telemetry capabilities of wireless implantable neural interfaces. To addre ...

IEEE2025

LIONHEART: A Layer-based Mapping Framework for Heterogeneous Systems with Analog In-Memory Computing Tiles

David Atienza Alonso, Giovanni Ansaloni, Marina Zapater Sancho, Irem Boybat Kara, Flavio Ponzina, Joshua Alexander Harrison Klein, Yuxuan Wang, Abu Sebastian

When arranged in a crossbar configuration, resistive memory devices can be used to execute Matrix-Vector Multiplications (MVMs), the most dominant operation of many Machine Learning (ML) algorithms, in constant time complexity. Nonetheless, when performing ...

Institute of Electrical and Electronics Engineers (IEEE)2025

Exact Neural Networks from Inexact Multipliers via Fibonacci Weight Encoding

David Atienza Alonso, Giovanni Ansaloni, Marina Zapater Sancho, Alexandre Sébastien Julien Levisse, William Andrew Simon

Edge devices must support computationally demanding algorithms, such as neural networks, within tight area/energy budgets. While approximate computing may alleviate these constraints, limiting induced errors remains an open challenge. In this paper, we pro ...

2021

Towards Accurate RISC-V Full System Simulation via Component-level Calibration

Karan Pathak, David Atienza Alonso, Giovanni Ansaloni, Marina Zapater Sancho, Joshua Alexander Harrison Klein

Full-System (FS) simulation is essential for performance evaluation of complete systems that execute complex applications on a complete software stack consisting of an operating system and user applications. Nevertheless, they require careful fine-tuning a ...

Association for Computing Machinery (ACM)2025

A Flexible In-Memory Computing Architecture for Heterogeneously Quantized CNNs

David Atienza Alonso, Giovanni Ansaloni, Alexandre Sébastien Julien Levisse, Flavio Ponzina, Marco Antonio Rios

Inferences using Convolutional Neural Networks (CNNs) are resource and energy intensive. Therefore, their execution on highly constrained edge devices demands the careful co-optimization of algorithms and hardware. Addressing this challenge, in this paper ...

2021

A flexible framework for early power and timing comparison of time-multiplexed CGRA kernel executions

David Atienza Alonso, Giovanni Ansaloni, Juan Pablo Sapriza Araujo

At the intersection between traditional CPU architectures and more specialized options such as FPGAs or ASICs lies the family of reconfigurable hardware architectures, termed Coarse-Grained Reconfigurable Arrays (CGRAs). CGRAs are composed of a 2-dimension ...

ACM2025

Thermal and Voltage-Aware Performance Management of 3D MPSoCs with Flow Cell Arrays and Integrated SC Converters

David Atienza Alonso, Giovanni Ansaloni, Marina Zapater Sancho, Alexandre Sébastien Julien Levisse, Halima Najibi

Flow cell arrays (FCAs) concurrently provide efficient on-chip liquid cooling and electrochemical power generation. This technology is especially promising for three-dimensional multi-processor systems-on-chip (3D MPSoCs) realized in deeply scaled technolo ...

2022

Cross-layer Exploration of 2.5D Energy-Efficient Heterogeneous Chiplets Integration: From System Simulation to Open Hardware

Anna Burdina, David Atienza Alonso, Giovanni Ansaloni, Miguel Peon Quiros, Pasquale Davide Schiavone

In the past decade, computing systems have significantly increased in complexity and power consumption. Nowadays, heterogeneous multi-processor systems-on-chip (MPSoCs) integrate many computing cores. Heterogeneous MPSoCs often comprise general-purpose pro ...

Association for Computing Machinery, Inc2024

Cross Layer Design for the Predictive Assessment of Technology-Enabled Architectures

David Atienza Alonso, Giovanni Ansaloni

There is great interest in "end-to-end" analysis that captures how innovation at the materials, device, and/or architectural levels will impact figures of merit at the application-level. However, there are numerous combinations of devices and architectures ...

IEEE2023

A Multi-Core Reconfigurable Architecture for Ultra-Low Power Bio-Signal Analysis

David Atienza Alonso, Giovanni Ansaloni, Ruben Braojos Lopez, Soumya Subhra Basu, Loris Gérard Duch

This paper introduces a novel computing architecture devoted to the ultra-low power analysis of multiple bio-signals. Its structure comprises several processors interfaced with a shared acceleration resource, implemented as a Coarse Grained Reconfigurable ...

2016

Heterogeneous and Inexact: Maximizing Power Efficiency of Edge Computing Sensors for Health Monitoring Applications

David Atienza Alonso, Giovanni Ansaloni, Miguel Peon Quiros, Soumya Subhra Basu, Loris Gérard Duch

In the Internet-of-Things (IoT) era, there is an increasing trend to enable intelligent behavior in edge computing sensors. Thus, a new generation of smart wearable devices for health monitoring is being developed, able to perform complex Digital Signal Pr ...

IEEE2018

i-DPs CGRA: An Interleaved-Datapaths Reconfigurable Accelerator for Embedded Bio-signal Processing

David Atienza Alonso, Giovanni Ansaloni, Miguel Peon Quiros, Soumya Subhra Basu, Loris Gérard Duch

Smart edge sensors for bio-signal monitoring must support complex signal processing routines within an extremely small energy envelope. Coarse-Grained Reconfigurable Arrays (CGRAs) are good candidates for tackling these conflicting objectives because, than ...

2019

Full System Exploration of On-Chip Wireless Communication on Many-Core Architectures

David Atienza Alonso, Giovanni Ansaloni, Marina Zapater Sancho, Yasir Mahmood Qureshi, Joshua Alexander Harrison Klein, Rafael Medina Morillas

In order to develop sustainable and more powerful information technology (IT) infrastructures, the challenges posed by the "memory wall" are critical for the design of high-performance and high-efficiency many-core computing systems. In this context, recen ...

IEEE2022

Bank on Compute-near-Memory: Design Space Exploration of Processing-near-Bank Architectures

Giovanni Ansaloni, Marina Zapater Sancho, Rafael Medina Morillas

Near-DRAM computing strategies advocate for providing computational capabilities close to where data is stored. Although this paradigm can effectively address the memoryto-processor communication bottleneck, it also presents new challenges: The strict reso ...

Institute of Electrical and Electronics Engineers (IEEE)2024

Synchronizing Code Execution on Ultra-Low-Power Embedded Multi-Channel Signal Analysis Platforms

David Atienza Alonso, Andreas Peter Burg, Giovanni Ansaloni, Ruben Braojos Lopez, Jeremy Hugues-Felix Constantin, Ahmed Yasir Dogan

Embedded biosignal analysis involves a considerable amount of parallel computations, which can be exploited by employing low-voltage and ultra-low-power (ULP) parallel computing architectures. By allowing data and instruction broadcasting, single instructi ...

2013

Modelling of vertical and ferroelectric junctionless technology for efficient 3D neural network compute cube dedicated to embedded artificial intelligence

David Atienza Alonso, Giovanni Ansaloni, Alexandre Sébastien Julien Levisse

This paper presents the set of simulation means used to develop the concept of N2C2 (neural network compute cube) based on a vertical transistor technology platform. On the basis of state-of-the-art junctionless nanowire transistors (JLNT), TCAD simulation ...

2021

A Methodology for Embedded Classification of Heartbeats Using Random Projections

David Atienza Alonso, Giovanni Ansaloni, Ruben Braojos Lopez

Smart Wireless Body Sensor Nodes (WBSNs) are a novel class of unobtrusive, battery-powered devices allowing the continuous monitoring and real-time interpretation of a subject’s bio-signals. One of its most relevant applications is the acquisition and anal ...

2013

Heterogeneous Error-Resilient Scheme for Spectral Analysis in Ultra-Low Power Wearable Electrocardiogram Devices

David Atienza Alonso, Giovanni Ansaloni, Georgios Karakonstantis, Pablo Garcia del Valle, Soumya Subhra Basu

Wearable devices performing advanced bio-signal analysis algorithms will foster a revolution in healthcare provision of chronic cardiac diseases. In this context, energy efficiency is of paramount importance, as long-term operations must be performed withi ...

IEEE Press2015

HEEPstor: an Open-Hardware Co-design Framework for Quantized Machine Learning at the Edge

David Atienza Alonso, Giovanni Ansaloni, Rafael Medina Morillas, Pedro Palacios Almendros

Edge-AI applications necessitate the joint application of hardware acceleration and software optimization to meet energy and area constraints. However, the co-design of these systems is hindered by the lack of integration options for novel hardware prototy ...

ACM2025

TiC-SAT: Tightly-coupled Systolic Accelerator for Transformers

David Atienza Alonso, Giovanni Ansaloni, Alireza Amirshahi, Joshua Alexander Harrison Klein

Transformer models have achieved impressive results in various AI scenarios, ranging from vision to natural language processing. However, their computational complexity and their vast number of parameters hinder their implementations on resource-constraine ...

2023