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Pierre-Emmanuel Julien Marc Gaillardon

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Related publications (117)

Page 3 of 6

Exploiting the Expressive Power of Graphene Reconfigurable Gates via Post-Synthesis Optimization

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Luca Gaetano Amarù

As an answer to the new electronics market demands, semiconductor industry is looking for different materials, new process technologies and alternative design solutions that can support Silicon replacement in the VLSI domain. The recent introduction of gra ...

ACM2015

Majority-Inverter Graph: A New Paradigm for Logic Optimization

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Luca Gaetano Amarù

In this paper, we propose a paradigm shift in representing and optimizing logic by using only majority (MAJ) and inversion (INV) functions as basic operations. We represent logic functions by Majority-Inverter Graph (MIG): a directed acyclic graph c ...

Ieee-Inst Electrical Electronics Engineers Inc2016

Method for speeding up boolean satisfiability

Giovanni De Micheli, Luca Gaetano Amarù, Pierre-Emmanuel Julien Marc Gaillardon

A method for transforming a tautology check of an original logic circuit into a contradiction check of the original logic circuit and vice versa comprises interpreting the original logic circuit in terms of AND, OR, MAJ, MIN, XOR, XNOR, INV original logic ...

2016

3.5-D Integration: A Case Study

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Ciprian Seiculescu, Vasileios Pavlidis, Shashi Kanth Bobba

Two diverse manufacturing techniques for building 3-D integrated systems are vertical integration with Through-Silicon-Vias (TSVs), also referred to as 3-D TSV integration, and 3-D monolithic integration. In this paper, we present a hybrid integration sche ...

2013

Nanowire systems: technology and design (invited paper)

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Davide Sacchetto, Luca Gaetano Amarù, Michele De Marchi, Shashi Kanth Bobba

Nanosystems are large-scale integrated systems exploiting nanoelectronic devices. In this work, we consider double independent gate, vertically-stacked nanowire FETs with gate-all-around structures and typical diameter of 20-nm. These devices, which we hav ...

Royal Soc2014

BDS-MAJ: A BDD-based Logic Synthesis Tool Exploiting Majority Logic Decomposition

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Luca Gaetano Amarù

Despite the impressive advance of logic synthesis during the past decades, a general methodology capable of efficiently synthesizing both control and datapath logic is still missing. Indeed, while synthe- sis techniques for random control logic (AND/OR-int ...

2013

Majority Logic Synthesis for Spin Wave Technology

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Luca Gaetano Amarù

Spin Wave Devices (SWDs) are promising beyond-CMOS candidates. Unlike traditional charge-based technologies, SWDs use spin as information carrier that propagates in waves. In this scenario, the logic primitive for computation is the majority gate. T ...

2014

Polarity Control in Double-Gate, Gate-All-Around Vertically Stacked Silicon Nanowire FETs

Giovanni De Micheli, Yusuf Leblebici, Davide Sacchetto, Pierre-Emmanuel Julien Marc Gaillardon, Jian Zhang, Michele De Marchi

We fabricated and characterized ambipolar Silicon Nanowire (SiNW) FET transistors featuring two independent Gate-All-Around (GAA) electrodes and vertically stacked SiNW channels. One of the gate electrodes is exploited to dynamically select the polarity of ...

2012

From Defect Analysis to Gate-Level Fault Modeling of Controllable-Polarity Silicon Nanowires

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Hassan Ghasemzadeh Mohammadi

Controllable-Polarity Silicon Nanowire Transistors (CP-SiNWFETs) are among the promising candidates to complement or even replace the current CMOS technology in the near future. Polarity control is a desirable property that allows the on-line configuration ...

Institute of Electrical and Electronics Engineers2015

Endurance Management for Resistive Logic-In-Memory Computing Architectures

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Mathias Soeken

Resistive Random Access Memory (RRAM) is a promising non-volatile memory technology which enables modern in-memory computing architectures. Although RRAMs are known to be superior to conventional memories in many aspects, they suffer from a low writ ...

Ieee2017

A Fast TCAD-based Methodology for Variation Analysis of Emerging Nano-Devices

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Majid Yazdani, Hassan Ghasemzadeh Mohammadi

Variability analysis of nanoscale transistors and circuits is emerging as a necessity at advanced technology nodes. Technology Computer Aided Design (TCAD) tools are powerful ways to get an accurate insight of Process Variations (PV). However ...

2013

Vertically-Stacked Silicon Nanowire Transistors with Controllable Polarity: a Robustness Study

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Hassan Ghasemzadeh Mohammadi

Vertically-stacked Silicon NanoWire FETs (SiN- WFETs) with gate-all-around control are the natural and most advanced extension of FinFETs. At advanced technology nodes, due to Schottky contacts at channel interfaces, devices show an ambipolar behavior, i.e ...

2013

Improving Circuit Mapping Performance Through MIG-based Synthesis for Carry Chains

Giovanni De Micheli, Paolo Ienne, Pierre-Emmanuel Julien Marc Gaillardon, Mathias Soeken, Luca Gaetano Amarù, Xifan Tang, Grace Zgheib, Ana Petkovska

Hard-wired carry chains in FPGAs are designed to improve efficiency of important arithmetic primitives. Although they are proven to be effective for arithmetic-rich functions, there are very few studies on the optimization opportunities of carry chains for ...

ACM2017

Doping-free complementary inverter enabled by 2D WSe2 electrostatically-doped reconfigurable transistors

Giovanni De Micheli, Giovanni Vincenzo Resta, Pierre-Emmanuel Julien Marc Gaillardon

Amongst 2-dimensional (2D) semiconductors of the transition-metal di-chalcogenide (TMDC) family [1], tungsten diselenide (WSe2) has shown ambipolar behavior [2], [3] coupled with high carrier mobility [4] and CMOS-like devices have been experimentally demo ...

IEEE2018

Exact Synthesis of Majority-Inverter Graphs and Its Applications

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Mathias Soeken, Luca Gaetano Amarù

We propose effective algorithms for exact synthesis of Boolean logic networks using satisfiability modulo theories (SMT) solvers. Since exact synthesis is a difficult problem, it can only be applied efficiently to very small functions, having up to 6 varia ...

Ieee-Inst Electrical Electronics Engineers Inc2017

Biconditional Binary Decision Diagrams: A Novel Canonical Logic Representation Form

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Luca Gaetano Amarù

In this paper, we present biconditional binary deci- sion diagrams (BBDDs), a novel canonical representation form for Boolean functions. BBDDs are binary decision diagrams where the branching condition, and its associated logic expansion, is biconditional ...

2014

A High-Performance Low-Power Near-Vt RRAM-based FPGA

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Xifan Tang

The routing architecture, heavily using programmable switches, dominates the area, delay and power of Field Programmable Gate Arrays (FPGAs). Resistive Random Access Memories (RRAMs) enable high-performance routing architectures through the r ...

2014

A PLiM Computer for the Internet of Things

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Mathias Soeken

Emerging applications are dramatically changing computer architecture requirements, with a shift toward big data that is processed using simple computations. A programmable logic-in-memory (PLiM) computer can allow memory cells to perform primitive logic o ...

2017

Resistive random access memory based multiplexers and field programmable gate arrays

Edouard Giacomin, Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Gain Kim, Xifan Tang

Resistive random access memory (RRAM) based multiplexers and field programmable gate arrays (FPGAs) are provided. The RRAM-based multiplexers and FPGAs include a 4T1R programming structure to program the RRAMs. The programming structure includes two progra ...

2018

Dual-threshold-voltage configurable circuits with three-independent gate silicon nanowire FETs

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Jian Zhang

We extend ambipolar silicon nanowire transistors by using three independent gates and show an efficient approach to implement dual-threshold-voltage configurable circuits. Polarity and threshold voltage of uncommitted devices are determined by applying dif ...

2013