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Luca Gaetano Amarù

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Related publications (63)

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Nanowire systems: technology and design (invited paper)

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Davide Sacchetto, Luca Gaetano Amarù, Michele De Marchi, Shashi Kanth Bobba

Nanosystems are large-scale integrated systems exploiting nanoelectronic devices. In this work, we consider double independent gate, vertically-stacked nanowire FETs with gate-all-around structures and typical diameter of 20-nm. These devices, which we hav ...

Royal Soc2014

NEM Relay Design with Biconditional Binary Decision Diagrams

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Luca Gaetano Amarù, Winston Jason Haaswijk

In this paper, we present an improved design flow for nanoelectromechanical (NEM) relay-based combinational logic circuits. Six-terminal NEM relays can be programmed to act as 2-to-1 multiplexers. We can therefore use NEM relays to implement arbitrary comb ...

IEEE2015

Canonical Computation without Canonical Representation

Mathias Soeken, Luca Gaetano Amarù, Ana Petkovska

A representation of a Boolean function is canonical if, given a variable order, only one instance of the representation is possible for the function. A computation is canonical if the result depends only on the Boolean function and a variable order, and do ...

IEEE2018

LUT Mapping and Optimization for Majority-Inverter Graphs

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Mathias Soeken, Luca Gaetano Amarù, Winston Jason Haaswijk

A Majority-Inverter Graph (MIG) is a directed acyclic graph in which every vertex represents a three-input majority operation and edges may be complemented to indicate operand inversion. MIGs have algebraic and Boolean properties that enable efficie ...

2016

Vertically Stacked Double Gate Nanowires FETs with Controllable Polarity: From Devices to Regular ASICs

Giovanni De Micheli, Yusuf Leblebici, Pierre-Emmanuel Julien Marc Gaillardon, Luca Gaetano Amarù, Davide Sacchetto, Shashi Kanth Bobba, Michele De Marchi

Vertically stacked nanowire FETs (NWFETs) with gate-all-around structure are the natural and most advanced extension of FinFETs. At advanced technology nodes, many devices exhibit ambipolar behavior, i.e., the device shows n- and p-type characteristics sim ...

2013

Majority-Inverter Graph for FPGA Synthesis

Giovanni De Micheli, Paolo Ienne, Pierre-Emmanuel Julien Marc Gaillardon, Luca Gaetano Amarù, David Novo Bruna, Ana Petkovska

In this paper, we present an FPGA synthesis flow based on Majority-Inverter Graph (MIG). An MIG is a directed acyclic graph consisting of three-input majority nodes and regular/complemented edges. MIG manipulation is supported by a consistent alge ...

2015

An MIG-based Compiler for Programmable Logic-in-Memory Architectures

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Mathias Soeken, Luca Gaetano Amarù

Resistive memories have gained high research attention for enabling design of in-memory computing circuits and systems. We propose for the first time an automatic compilation methodology suited to a recently proposed computer architecture solely based on r ...

Ieee2016

Inversion optimization in majority-inverter graphs

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Mathias Soeken, Luca Gaetano Amarù, Eleonora Testa

Many emerging nanotechnologies realize majority gates as primitive building blocks and they benefit from a majority-based synthesis. Recently, Majority-Inverter Graphs (MIGs) have been introduced to abstract these new technologies. We present optimi ...

Ieee2016

Notes on Majority Boolean Algebra

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Mathias Soeken, Luca Gaetano Amarù

A Majority-Inverter Graph (MIG) is a homogeneous logic network, where each node represents the majority function. Recently, a logic optimization package based on the MIG data-structure, with 3-input majority node (M3) has been proposed [2], [30]. It is dem ...

IEEE2016

MIXSyn: An Efficient Logic Synthesis Methodology for Mixed XOR-AND/OR Dominated Circuits

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Luca Gaetano Amarù

We present a new logic synthesis methodology, called MIXSyn, that produces area-efficient results for mixed XOR-AND/OR dominated logic functions. MIXSyn is a two step synthesis process. The first step is a hybrid logic optimization that enables selective a ...

2013

Controllable polarity fet based arithmetic and differential logic

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Luca Gaetano Amarù

A logic gate with three inputs A, B, and C, and one output implementing a function MAJ(A,B,C)=AB+BC+A*C comprising two mutually exclusive transmission gates (TGs) connected in series, based on two parallel double-gate controllable polarity devices, a pol ...

2014

Wave Pipelining for Majority-based Beyond-CMOS Technologies

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Mathias Soeken, Luca Gaetano Amarù, Eleonora Testa

The performance of some emerging nanotechnolo- gies benefits from wave pipelining. The design of such circuits re- quires new models and algorithms. Thus we show how Majority- Inverter Graphs (MIG) can be used for this purpose and we extend the related opt ...

2017

SAT-Sweeping Enhanced for Logic Synthesis

Giovanni De Micheli, Luca Gaetano Amarù, Eleonora Testa

SAT-sweeping is a powerful method for simplifying logic networks. It consists of merging gates that are proven equivalent (up to complementation) by running simulation and SAT solving in synergy. SAT-sweeping is used in both verification and synthesis appl ...

IEEE2020

LUT-Based Optimization For ASIC Design Flow

Giovanni De Micheli, Eleonora Testa, Luca Gaetano Amarù

In this paper, we develop a new LUT-based optimization flow tailored for the synthesis of ASICs rather than FPGAs. We enhance LUT-mapping to consider the literal/AIG cost of LUT-nodes. We extend traditional Boolean methods to simplify and re-shape LUT-netw ...

2021

An Efficient Manipulation Package for Biconditional Binary Decision Diagrams

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Luca Gaetano Amarù

Biconditional Binary Decision Diagrams (BBDDs) are a novel class of binary decision diagrams where the branching condition, and its associated logic expansion, is biconditional on two variables. Reduced and ordered BBDDs are remarkably compact and unique f ...

IEEE2014

Practical Exact Synthesis

Giovanni De Micheli, Mathias Soeken, Luca Gaetano Amarù, Eleonora Testa, Winston Jason Haaswijk

In this paper, we discuss recent advances in exact synthesis, considering both their efficient implementation and various applications in which they can he employed. We emphasize on solving exact synthesis through Boolean satisfiability (SAT) encodings. Di ...

IEEE2018

Towards Structured ASICs Using Polarity-Tunable SiNW Transistors, invited

Giovanni De Micheli, Yusuf Leblebici, Pierre-Emmanuel Julien Marc Gaillardon, Luca Gaetano Amarù, Davide Sacchetto, Shashi Kanth Bobba, Michele De Marchi

In addition to scaling semiconductor devices down to their physical limit, novel devices show enhanced functionality compared to conventional CMOS. At advanced technology nodes, many devices exhibit ambipolar behavior, i.e., they show n- and p-type charact ...

2013

A Logic Synthesis Toolbox for Reducing the Multiplicative Complexity in Logic Networks

Giovanni De Micheli, Mathias Soeken, Heinz Riener, Eleonora Testa, Luca Gaetano Amarù

Logic synthesis is a fundamental step in the realization of modern integrated circuits. It has traditionally been employed for the optimization of CMOS-based designs, as well as for emerging technologies and quantum computing. Recently, it found applicatio ...

IEEE2020

Reversible Logic Synthesis via Biconditional Binary Decision Diagrams

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Luca Gaetano Amarù

Reversible logic synthesis is an emerging research area to aid the circuit implementation for multiple nano-scale technologies with bounded fan-out. Due to the inherent com- plexity of this problem, several heuristics are proposed in the literature. Among ...

2015

Spintronic Majority Gates

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Luca Gaetano Amarù

In this paper we present an overview of two types of majority gate devices based on spintronic phenomena. We compare the spin torque majority gate and the spin wave majority gate and describe work on these devices. We discuss operating conditions for the t ...

2015