Publications by Shenqi Xie | EPFL Graph Search

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We report on the top-down fabrication of vertically-stacked polysilicon nanowire (NW) gate-all-around (GAA) field-effect-transistors (FET) by means of Inductively Coupled Plasma (ICP) etching and nanostencil lithography. The nanostencil is used to form sub ...

Stencil lithography (SL) is a shadow mask based technique which allows parallel, resistless, micro- and nano-patterning of material through apertures in a membrane (stencil) onto a substrate [1]. The stencils are usually made of LPCVD low-stress SiN due to ...

We demonstrate a high-resolution implementation of quasi-dynamic stencil lithography based on the integration of a micro-hotplate on the stencil membrane. The stencil design has been tailored so that the thermally actuated membrane reduces the gap between ...

To grow small molecule semiconductor thin films with domain size larger than modern-day device sizes, we evaporate the material through a dense array of small apertures, called a stencil nanosieve. The aperture size of 0.5 μm results in low nucleation dens ...

We demonstrate a novel concept for nanostencil lithography with an integrated microhotplate on the stencil membrane aimed at eliminating or reducing aperture clogging during metal deposition. The stencil can be locally heated up by the embedded Pt coils to ...

In order to realize high-performance organic thin-film transistors (TFT), two parameters of the organic semiconducting layer are desired: single crystallinity for high mobility and patterning for low off currents. High-quality single crystals can be fabric ...

Dynamic stencil lithography uses a moving shadow-mask to draw patterns by having directionally evaporated material deposited through the stencil apertures onto the substrate. Sub-micrometre, two- dimensional patterning is demonstrated at full 100 mm wafer ...

Stencil lithography (SL) is a shadow mask technique which allows parallel, resistless, micro- and nano- patterning of material through apertures created in a membrane (stencil) onto a substrate. The stencils are usually made of LPCVD low-stress SiN due to ...

The invention concerns a method and a device wherein a stencil is provided with an integrated microhotplate on the stencil membrane to prevent aperture clogging, whereby the stencil can be locally heated up in order to minimize material condensation, remov ...

Shenqi Xie

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Vertically-stacked gate-all-around polysilicon nanowire FETs with sub-μm gates patterned by nanostencil lithography

Robust PECVD SiC membrane made for stencil lithography

In-situ actuated gap reduction and clogging-free apertures for quasi-dynamic stencil lithography

Growth Of Organic Semiconductor Thin Films with Multi-Micron Domain Size and Fabrication of Organic Transistors Using a Stencil Nanosieve

Heated membranes prevent clogging of apertures in nanostencil lithography

Arrays of Pentacene Single Crystals by Stencil Evaporation

100 mm dynamic stencils pattern sub-micrometre structures

Robust PECVD SiC membrane made for stencil lithography

Vertically-Stacked Si Nanowire FETs with sub-micrometer Gate-All-Around polysilicon gates patterned by nanostencil lithography

Heated mask

Hot Stencils : A New Path for Resistless Nanopatterning

Thermal control extends heated stencil’s life-time