Publications by Nikola Katic | EPFL Graph Search

Related publications (11)

Smart Imaging and On-Focal-Plane Image Acquisition and Processing in Standard CMOS Technology

In recent years, modern imaging sensors and systems have become increasingly complex following the growing demand for high-quality and high-resolution imaging. Commercially available sensors having 30-40 mega-pixel resolutions are common nowadays, while pr ...

EPFL2014

A Retina-Inspired Robust On-Focal-Plane Multi-Band Edge-Detection Scheme for CMOS Image Sensors

Yusuf Leblebici, Alexandre Schmid, Nikola Katic

An edge-detection scheme suitable for machine vision and digital motion detection applications is presented. The scheme is inspired by the human visual system (human retina) and modified for a compact and scalable CMOS hardware implementation. In addition, ...

IEEE2014

A comparative experimental investigation on responsivity and response speed of photo-diode and photo-BJT structures integrated in a low-cost standard CMOS process

Yusuf Leblebici, Alexandre Schmid, Nikola Katic

A variety of smart imaging and neuromorphic applications perform time-domain image acquisition in order to imitate biological systems and reduce the growing transmission bandwidth of the modern imaging devices. Because they operate in time-domain, they req ...

Elsevier2015

A Subthreshold Current-Sensing Sigma-Delta Modulator for Low-Voltage and Low-Power Sensor Interfaces

Yusuf Leblebici, Alexandre Schmid, Seyed Armin Tajalli, Nikola Katic

A continuous-time (CT) ΣΔ modulator for sensing and direct analog-to-digital conversion of nA-range (subthreshold) currents is presented in this work. The presented modulator uses a subthreshold technique based on subthreshold source-coupled logic cells to ...

Wiley2015

Power-Efficient CMOS Image Acquisition System based on Compressive Sampling

Yusuf Leblebici, Pierre Vandergheynst, Alexandre Schmid, Mahdad Hosseini Kamal, Nikola Katic, Mustafa Kilic

A novel compressive sampling scheme suitable for highly scalable hardware implementations is presented. The prototype design is implemented in a 0.18um standard CMOS technology and utilizes compressed acquisition to boost the overall power efficiency. Spec ...

IEEE2013

Column-Separated Compressive Sampling Scheme for Low Power CMOS Image Sensors

Yusuf Leblebici, Pierre Vandergheynst, Alexandre Schmid, Mahdad Hosseini Kamal, Nikola Katic, Mustafa Kilic

A novel compressive sampling scheme suitable for highly scalable hardware implementations is presented. The scheme utilizes an identical pseudo-random sequence for every image column, therefore reducing in-pixel hardware complexity and allowing measurement ...

IEEE2013

Compressive Image Acquisition in Modern CMOS IC Design

Yusuf Leblebici, Pierre Vandergheynst, Alexandre Schmid, Mahdad Hosseini Kamal, Nikola Katic

Compressive Sampling (CS) offers bandwidth, power and memory size reduction compared to conventional (Nyquist) sampling. However, very few Integrated Circuit (IC) designs based on CS exist due to the missing link between the well-established CS theory on o ...

Wiley-Blackwell2013

A Relative Imaging CMOS Image Sensor for High Dynamic Range and High Frame-Rate Machine Vision Imaging Applications

Yusuf Leblebici, Alexandre Schmid, Vladan Popovic, Nikola Katic, Radisav Cojbasic

This paper proposes an unconventional image acquisition scheme for machine vision applications, based on detecting ratios of illumination (pixel) intensities. Detecting relative ratios enables capturing the scene features and patterns almost independently ...

Institute of Electrical and Electronics Engineers2015

A Sub-mW Pulse-Based 5-bit Flash ADC with a Time-Domain Fully-Digital Reference Ladder

Yusuf Leblebici, Alexandre Schmid, Nikola Katic, Radisav Cojbasic

Journal article A sub-mW pulse-based 5-bit flash ADC with a time-domain fully-digital reference ladder: A Katic, Nikola; Cojbasic, Radisav; Schmid, Alexandre; Leblebici, Yusuf Published in: Microelectronics Journal (ISSN: 0026-2692), vol. 46, num. 12, ...

Elsevier2015

A 5.43-μW 0.8-V Subthreshold Current-Sensing Σ∆ Modulator for Low-Noise Sensor Interfaces

Yusuf Leblebici, Alexandre Schmid, Seyed Armin Tajalli, Nikola Katic

A micro-watt power subthreshold current modulator suitable for low-power and low-noise sensor interfaces is presented. The prototype design is based on Subthreshold Source Coupled Logic (STSCL) cells and implemented in a 0.18 μm standard CMOS technology. T ...

2014

CMOS-Integrated Photodetectors for Neuromorphic and Smart Imaging Applications: a Low-Cost Design and Measurement Method

Yusuf Leblebici, Alexandre Schmid, Nikola Katic

2014