Publications by Alexandre Schmid

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An edge-detection scheme suitable for machine vision and digital motion detection applications is presented. The scheme is inspired by the human visual system (human retina) and modified for a compact and scalable CMOS hardware implementation. In addition, ...

High defect density exhibited by nanoelectronic technologies, and parameter variability already affecting the operation of very-deep submicron CMOS systems demand for a combination of specific solutions, focusing at each various levels of abstraction in the development design-flow. Where traditionally applied methods fail under massive defect densities, we propose a top-down development strategy where the hardware overhead is adapted to the desired level of reliability. A CAD software tool supporting the me

This paper presents a charge controlling circuit technique to integrate a charge balancer circuitry in the output-stage of electrical neural stimulators with the aim to reduce the area and the power consumption of the charge balancing circuitry. The propos ...

This paper presents a neural recording amplifier array suitable for large-scale integration with multielectrode arrays in very low-power microelectronic cortical implants. The proposed amplifier is one of the most energy-efficient structures reported to da ...

An accurate epileptic seizure detector using intracranial electroencephalography (iEEG) recordings, suitable for low-power wearable/implantable applications, is presented. Eleven time-domain features with low hardware complexity are employed in the feature ...

A 16-channel neural action potential recording IC suitable for large-scale integration with multi-electrode arrays (MEAs) is presented. A closed-loop gain of 60 dB in the action potential band is achieved by cascading differential gain-stages utilizing a n ...

This paper presents a method enabling the evaluation of the averaging fault-tolerant technique, using the output probability density functions (PDFs) of unreliable units which are acquired from Monte Carlo simulations. The method has been verified by compa ...

Unstructured neural network pruning algorithms have achieved impressive compression ratios. However, the resulting-typically irregular-sparse matrices hamper efficient hardware implementations, leading to additional memory usage and complex control logic t ...

Early and accurate detection of epileptic seizures is an extremely important therapeutic goal due to the severity of complications it can prevent. To this end, a low-power machine learning-based seizure detection implemented on an FPGA is proposed in this ...

Wearable solutions based on Deep Learning (DL) for real-time ECG monitoring are a promising alternative to detect life-threatening arrhythmias. However, DL models suffer of a large memory footprint, which hampers their adoption in portable technologies. Th ...

A variety of smart imaging and neuromorphic applications perform time-domain image acquisition in order to imitate biological systems and reduce the growing transmission bandwidth of the modern imaging devices. Because they operate in time-domain, they req ...

Model compression techniques have lead to a reduction of size and number of computations of Deep Learning models. However, techniques such as pruning mostly lack of a real co-optimization with hardware platforms. For instance, implementing unstructured pru ...

This letter presents the design of a 13.56 MHz offset-enhanced full-wave active rectifier, tailored for wirelessly powered biomedical implants. The design incorporates digitally assisted, delay-compensated active diodes and symmetrical bulk biasing in the ...

Hardware-software co-design is crucial in the design of artificial intelligence (AI) inference accelerators. This study supports the development of a variable-parallelism reconfigurable architecture designed to achieve high-efficiency and low-power computation for diverse AI models. We provide software-side design support to achieve high accuracy with limited computational resources. We propose an algorithm that automatically explores hardware configurations by selecting a layer-wise computation flow to ach

Omnidirectional stereoscopy and depth estimation are complex problems of image processing to which the Panoptic camera offers a novel solution. The Panoptic camera is a biologically-inspired vision sensor made of multiple cameras. It is a polydioptric syst ...

The floating gate (FG) potential VFG in a non–volatile flash memory (NVM) device is the main parameter controlling the behavior of the cell. A common technique to model VFG is based on the calculation of the coupling coefficients between all the terminals ...

Safety and energy efficiency are two major concerns for implantable neural stimulators. This paper presents a novel high-frequency, switched capacitor (HFSC) stimulation and active charge balancing scheme, which achieves high energy efficiency and well-con ...

A continuous-time (CT) ΣΔ modulator for sensing and direct analog-to-digital conversion of nA-range (subthreshold) currents is presented in this work. The presented modulator uses a subthreshold technique based on subthreshold source-coupled logic cells to ...

Smart and miniaturized implantable microsystems with diagnostic and therapeutic capabilities are becoming increasingly important for patients suffering from neurological disorders such as epilepsy. Recent developments in microfabrication technology have provided new insights into seizure generation at an unprecedented spatial scale. Based on these findings, designing powerful acquisition systems capable of probing the wide-range spatiotemporal activities within the brain holds a great promise to improve the

A multiphonon-assisted model included in a Poisson-Schroedinger solver has been applied to the calculation of the capture/emission trapping rates of CMOS oxide interface defects. The dependencies of trap capture cross-sections with trap energy, depth, appl ...

Alexandre Schmid

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A Retina-Inspired Robust On-Focal-Plane Multi-Band Edge-Detection Scheme for CMOS Image Sensors

Design for Reliability of Nanometer-Scale Electronics under High Defect Density

An active charge balancing method suitable for integration in the output-stage of electrical neural stimulators

Energy Efficient Low-Noise Neural Recording Amplifier With Enhanced Noise Efficiency Factor

Epileptic Seizure Detection With Patient-Specific Feature and Channel Selection for Low-power Applications

A 16-channel 220 µW neural recording IC with embedded delta compression

Optimization of the Averaging Reliability Technique using Low Redundancy Factors for Nanoscale Technologies

Dynamic Probabilistic Pruning: A General Framework for Hardware-Constrained Pruning at Different Granularities

Hardware-Friendly Random Forest Classification of iEEG Signals for Implantable Seizure Detection

Hardware-oriented pruning and quantization of Deep Learning models to detect life-threatening arrhythmias

A comparative experimental investigation on responsivity and response speed of photo-diode and photo-BJT structures integrated in a low-cost standard CMOS process

Structured and tiled-based pruning of Deep Learning models targeting FPGA implementations

An offset-enhanced active rectifier with delay compensated active diodes for wirelessly powered biomedical implants

Co-Optimization of Models and Hardware for Neural Network Inference in Variable-Parallelism Processor

Enhanced Omnidirectional Image Reconstruction Algorithm and its Real-Time Hardware

Analytical and compact models of the ONO capacitance in embedded non-volatile flash devices

Compact, Energy-Efficient High-Frequency Switched Capacitor Neural Stimulator With Active Charge Balancing

A Subthreshold Current-Sensing Sigma-Delta Modulator for Low-Voltage and Low-Power Sensor Interfaces

A Power-Efficient Compressive Sensing Platform for Cortical Implants

Analysis of defect capture cross sections using non-radiative multiphonon-assisted trapping model