Covers the historical increase in memory cells per chip, the importance of memory in modern IC architectures, the dramatic increase in test time, and various memory faults.
Explores memory consistency, cache coherence, and relaxed models in modern CPUs, emphasizing the balance between strict ordering and flexible memory operations.
Explores property ownership distribution in Geneva, highlighting wealth concentration in urban areas and significant public ownership in peripheral regions.
Covers MLIR, a compiler infrastructure for domain-specific computation, emphasizing the importance of multiple abstraction levels and higher-level semantics.