Lecture

NIOS II - Avalon Bus

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In course

CS-476: Embedded system design

Hardware-software co-design is a well known concept in embedded system design.It is also a concept required in designing FPGA-accelerators in data-centers.This course teaches how to transform algorithms in smart hardware-software solutions. ...

Description

This lecture covers the architecture of an embedded system on FPGA, focusing on the NIOS II softcore processor and the Avalon Bus. Topics include the design of specific interfaces, the structure of the NIOS II processor, and the principles of the Avalon Switch Fabric. The lecture also discusses the performance gains achieved through custom instructions and hardware accelerators. Additionally, it explores the computer architecture on FPGA, SOPC architecture, and the system example on FPGA. The lecture concludes by highlighting the advantages and disadvantages of a softcore architecture for embedded systems.

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Instructor

Ties Jan Henderikus Kluter

Since January 2011: Teaching digital systems at the Swiss Federal Institute of Technology, Lausanne Switzerland Since August 2009: Teaching responsible for digital systems at the university of applied science of Bern, Bienne Switzerland 2003-2010: Ph.D. candidate at the Swiss Federal Institute of Technology, Lausanne Switzerland 2002-2003: Product development team leader in the infotainment group of Agere Systems, Nieuwegein The Netherlands. 1997-2003: Design Engineer in the design services group of Dedris Embedded Algorithms/Frontier Design BV./Adelante Technologies, Tiel The Netherlands 1996-1997: Assistant R&D at the faculty of computer controlled systems and computer techniques University of Twente, Enschede The Netherlands 1992-1996: MSc. education at the Technical University of Twente, Enschede The Netherlands 1988-1992: Bc. edudation at the Higher Technical School of Groningen, Groningen The Netherlands

Official source

Ontological neighbourhood

Computer engineering

Hardware engineering: Microprocessors

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The von Neumann architecture—also known as the von Neumann model or Princeton architecture—is a computer architecture based on a 1945 description by John von Neumann, and by others, in the First Draft of a Report on the EDVAC. The document describes a design architecture for an electronic digital computer with these components: A processing unit with both an arithmetic logic unit and processor registers A control unit that includes an instruction register and a program counter Memory that stores data and instructions External mass storage Input and output mechanisms The term "von Neumann architecture" has evolved to refer to any stored-program computer in which an instruction fetch and a data operation cannot occur at the same time (since they share a common bus).

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