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Concept

Bus (computing)

Related publications (26)

Optical Signal Processing and Pulse Shaping for Wavelength Multiplexed High Speed Communication Systems

Mohammad Amin Shoaie

The steady growth of capacity demand in telecommunication networks has sparked the development of various photonic devices for ultrafast optical signal processing functions to meet the requirements of future flexible fiber networks in general and backbone ...

EPFL2016

Confluence: unified instruction supply for scale-out servers

Babak Falsafi, Boris Robert Grot, Ilknur Cansu Kaynak

Multi-megabyte instruction working sets of server workloads defy the capacities of latency-critical instruction-supply components of a core; the instruction cache (L1-I) and the branch target buffer (BTB). Recent work has proposed dedicated prefetching tec ...

ACM Press2015

Low Power 3D Serial TSV Link for High Bandwidth Cross-Chip Communication

Giovanni De Micheli, Yusuf Leblebici, Alessandro Cevrero, Giulia Beanato

3D-ICs based on TSV technology provide high bandwidth inter-chip connections. The drawback is that most of the existing TSVs consume a large amount of silicon real estate. We present circuit-level design and analysis of area efficient, low power, high-data ...

2014

An Ultra-High Speed Emulator Dedicated to Power System Dynamics Computation Based on a Mixed-Signal Hardware Platform

Maher Kayal, Sidi-Rachid Cherkaoui, Laurent Fabre, Ira Nagel, Guillaume Olivier Lanz, Theodoros Kyriakidis, Denis Sallin

This paper presents an ultra-high speed hardware platform dedicated to power system dynamic (small signal) and transient (large signal) stability. It is based on an intrinsic parallel architecture which contains hybrid mixed-signal (analog and digital) cir ...

IEEE Institute of Electrical and Electronics Engineers2013

An Enhanced Design Methodology for Resonant Clock Trees

Giovanni De Micheli, Vasileios Pavlidis, Xifan Tang, Somayyeh Rahimian Omam

Clock distribution networks consume a considerable portion of the power dissipated by synchronous circuits. In conventional clock distribution networks, clock buffers are inserted to retain signal integrity along the long interconnects, which, in turn, sig ...

American Scientific Publishers2013

Power and pin efficient chip-to-chip communications with common-mode rejection and sso resilience

Mohammad Amin Shokrollahi, Harm Cronie

In bus communications methods and apparatus, a first set of physical signals representing the information to be conveyed over the bus is provided, and mapped to a codeword of a spherical code, wherein a codeword is representable as a vector of a plurality ...

2012