Concept

Critical path method

Related publications (24)

A Delay and Power Efficient Voltage Level Shifter with Low Leakage Power

This paper presents a new power-efficient and high-speed voltage level shifter. In the proposed structure, the existing contentions at the internal nodes are reduced using auxiliary transistors and feedback networks, leading to a significant reduction in t ...

IEEE2023

Crystalline or amorphous? A critical evaluation of phenomenological phase selection rules

Johann Michler, Caroline Hain

In this work, we reviewed the available phase selection rules comprising atomic size and topological aspects, entropies, enthalpies, melting points, valence and itinerant electron concentrations, as well as electronegativity, and validated them using a car ...

ELSEVIER SCI LTD2023

A Comprehensive Timing Model for Accurate Frequency Tuning in Dataflow Circuits

Paolo Ienne, Andrea Guerrieri, Lana Josipovic

The ability of dataflow circuits to implement dynamic scheduling promises to overcome the conservatism of static scheduling techniques that high-level synthesis tools typically rely on. Yet, the same distributed control mechanism that allows dataflow circu ...

IEEE COMPUTER SOC2022

Two-layer adaptive signal control framework for large-scale networks combining efficient Max-Pressure and Perimeter Control

Nikolaos Geroliminis, Anastasios Kouvelas, Dimitrios Tsitsokas

This work investigates the benefits of a two-layer adaptive signal control framework combining multi-region perimeter control (PC) with distributed Max Pressure (MP) control in selected network intersections. Motivated by MP’s questionable performance in o ...

2022

Detailed Placement for Dedicated LUT-Level FPGA Interconnect

Paolo Ienne, Grace Zgheib, Stefan Nikolic

In this work, we develop timing-driven CAD support for FPGA architectures with direct connections between LUTs. We do so by proposing an efficient ILP-based detailed placer, which moves a carefully selected subset of LUTs from their original positions, so ...

ASSOC COMPUTING MACHINERY2022

Large-scale traffic signal control and multimodal network design

Dimitrios Tsitsokas

Traffic congestion constitutes one of the most frequent, yet challenging, problems to address in the urban space. Caused by the concentration of population, whose mobility needs surpass the serving capacity of urban networks, congestion cannot be resolved ...

EPFL2022

High-resolution fast-tomography brain-imaging beamline at the Taiwan Photon Source

Giorgio Margaritondo

The new Brain Imaging Beamline (BIB) of the Taiwan Photon Source (TPS) has been commissioned and opened to users. The BIB and in particular its endstation are designed to take advantage of bright unmonochromatized synchrotron X-rays and target fast 3D imag ...

INT UNION CRYSTALLOGRAPHY2021

How to detect and reduce potential sources of biases in studies of SARS-CoV-2 and COVID-19

Mats Julius Stensrud

In response to the coronavirus disease (COVID-19) pandemic, public health scientists have produced a large and rapidly expanding body of literature that aims to answer critical questions, such as the proportion of the population in a geographic area that h ...

2021

Straight to the Point: Intra- and Intercluster LUT Connections to Mitigate the Delay of Programmable Routing

Paolo Ienne, Grace Zgheib, Stefan Nikolic

Technology scaling makes metal delay ever more problematic, but routing between Look-Up Tables (LUTs) still passes through a series of transistors. It seems wise to avoid the corresponding delay whenever possible. Direct connections between LUTs, both with ...

ASSOC COMPUTING MACHINERY2020

The RECIPE approach to challenges in deeply heterogeneous high performance systems

David Atienza Alonso, Marina Zapater Sancho

RECIPE (REliable power and time-ConstraInts-aware Predictive management of heterogeneous Exascale systems) is a recently started project funded within the H2020 FETHPC programme, which is expressly targeted at exploring new High-Performance Computing (HPC) ...

ELSEVIER2020

Closing Leaks: Routing Against Crosstalk Side-Channel Attacks

Mirjana Stojilovic, Seyedeh Sharareh Mirzargar

This paper presents an extension to PathFinder FPGA routing algorithm, which enables it to deliver FPGA designs free from risks of crosstalk attacks. Crosstalk side-channel attacks are a real threat in large designs assembled from various IPs, where some I ...

2020

Shockwave identification and critical parameter estimation using a detailed dataset from a swarm of drones

Nikolaos Geroliminis, Emmanouil Barmpounakis

In the era of big data, new transportation-related concepts and methodologies need to be proposed for understanding how congestion propagates. pNEUMA, a unique dataset that was acquired during a first-of-its-kind experiment with a swarm of drones over a de ...

2020

Design of approximate and precision-scalable circuits for embedded multimedia and neural-network processing

Vincent Frédéric Camus

Density, speed and energy efficiency of integrated circuits have been increasing exponentially for the last four decades following Moore's law. However, power and reliability pose several challenges to the future of technology scaling. Approximate computin ...

EPFL2019

Joint Fusion Learning of Multiple Time Series Prediction

Accurate traffic density estimations is essential for numerous purposes like the developing successful transit policies or to forecast future traffic conditions for navigation. Current developments in the machine learning and computer systems bring the tra ...

2019

Learning How To Recognize Faces In Heterogeneous Environments

Tiago De Freitas Pereira

Face recognition is a mature field in biometrics in which several systems have been proposed over the last three decades. Such systems are extremely reliable under controlled recording conditions and it has been deployed in the field in critical tasks, suc ...

EPFL2019

SBFT: a Scalable and Decentralized Trust Infrastructure

Dragos-Adrian Seredinschi

SBFT is a state of the art Byzantine fault tolerant state machine replication system that addresses the challenges of scalability, decentralization and global geo-replication. SBFT is optimized for decentralization and is experimentally evaluated on a depl ...

IEEE COMPUTER SOC2019

‘The Towers of Terror’: A Critical Analysis of Ernő Goldfinger’s Balfron and Trellick Towers

Nicola Braghieri

When J. G. Ballard published his masterpiece High-Rise in 1975, many readers in London automatically identified the apartment building that is the protagonist of the dystopian novel as the infamous Trellick Tower at Kensal Town, certainly one of the most c ...

2019

Closing the Performance Gap Between Volatile and Persistent Key-Value Stores Using Cross-Referencing Logs

Matej Pavlovic

Key-Value (K-V) stores are an integral building block in modern datacenter applications. With byteaddressable persistent memory (PM) technologies, such as Intel/Micron's 3D XPoint, on the horizon, there has been an influx of new high performance K-V stores ...

USENIX ASSOC2018

Design of Approximate Circuits by Fabrication of False Timing Paths: The Carry Cut-Back Adder

Christian Enz, Vincent Frédéric Camus, Jérémy Lucien Maurice Schlachter, Mattia Cacciotti

This paper introduces a novel method for designing approximate circuits by fabricating and exploiting false timing paths, i.e. critical paths that cannot be logically activated. This allows to strongly relax timing constraints while guaranteeing minimal an ...

2018

Trading off Energy versus Accuracy in Modern Computing Systems : From Digital Circuit Design to Programming Techniques

Jérémy Lucien Maurice Schlachter

The slowdown of Moore's law, which has been the driving force of the electronics industry over the last 5 decades, is causing serious problem to Integrated Circuits (ICs) improvements. Technology scaling is becoming more and more complex and fabrication co ...

EPFL2018